diff options
| author | Andrew Davis <afd@ti.com> | 2024-01-24 21:36:59 +0300 |
|---|---|---|
| committer | Vignesh Raghavendra <vigneshr@ti.com> | 2024-02-05 16:55:57 +0300 |
| commit | 6cce60550763564360beadf57ecf2e4d45b585e1 (patch) | |
| tree | 4bb92a92526e6146faa8ffbb6ce2b1c9e6da853d /arch/arm64/boot/dts/ti/k3-am64-main.dtsi | |
| parent | e074d9d9a52eec11cd8b3f98e2576b0c762686f1 (diff) | |
| download | linux-6cce60550763564360beadf57ecf2e4d45b585e1.tar.xz | |
arm64: dts: ti: k3-am64: Remove PCIe endpoint node
This node is an example node for the PCIe controller in "endpoint" mode.
By default the controller is in "root complex" mode and there is already a
DT node for the same.
Examples should go in the bindings or other documentation.
Remove this node.
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20240124183659.149119-4-afd@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Diffstat (limited to 'arch/arm64/boot/dts/ti/k3-am64-main.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 19 |
1 files changed, 0 insertions, 19 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi index e348114f42e0..d5938f966a2d 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -1041,25 +1041,6 @@ status = "disabled"; }; - pcie0_ep: pcie-ep@f102000 { - compatible = "ti,am64-pcie-ep", "ti,j721e-pcie-ep"; - reg = <0x00 0x0f102000 0x00 0x1000>, - <0x00 0x0f100000 0x00 0x400>, - <0x00 0x0d000000 0x00 0x00800000>, - <0x00 0x68000000 0x00 0x08000000>; - reg-names = "intd_cfg", "user_cfg", "reg", "mem"; - interrupt-names = "link_state"; - interrupts = <GIC_SPI 203 IRQ_TYPE_EDGE_RISING>; - ti,syscon-pcie-ctrl = <&main_conf 0x4070>; - max-link-speed = <2>; - num-lanes = <1>; - power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 114 0>; - clock-names = "fck"; - max-functions = /bits/ 8 <1>; - status = "disabled"; - }; - epwm0: pwm@23000000 { compatible = "ti,am64-epwm", "ti,am3352-ehrpwm"; #pwm-cells = <3>; |