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authorAndrew Davis <afd@ti.com>2023-08-10 03:38:03 +0300
committerNishanth Menon <nm@ti.com>2023-08-10 06:30:06 +0300
commit013b7dd32c75ad3db218aa7a2d63f541304ac3b6 (patch)
treeb9f7bf09e730642dbd534e22460e604a51e6b738 /arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
parent6fbd1310f99fc95d063b64d42addf701309663d6 (diff)
downloadlinux-013b7dd32c75ad3db218aa7a2d63f541304ac3b6.tar.xz
arm64: dts: ti: k3-j7200: Enable SDHCI nodes at the board level
SDHCI nodes defined in the top-level J7200 SoC dtsi files are incomplete and will not be functional unless they are extended. As the attached SD/eMMC is only known about at the board integration level, these nodes should only be enabled when provided with this information. Disable the SDHCI nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20230810003814.85450-3-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
Diffstat (limited to 'arch/arm64/boot/dts/ti/k3-j7200-main.dtsi')
-rw-r--r--arch/arm64/boot/dts/ti/k3-j7200-main.dtsi2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
index e695f7881733..5ffcbd8acf86 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
@@ -655,6 +655,7 @@
mmc-hs200-1_8v;
mmc-hs400-1_8v;
dma-coherent;
+ status = "disabled";
};
main_sdhci1: mmc@4fb0000 {
@@ -678,6 +679,7 @@
ti,clkbuf-sel = <0x7>;
ti,trm-icp = <0x8>;
dma-coherent;
+ status = "disabled";
};
serdes_wiz0: wiz@5060000 {