summaryrefslogtreecommitdiff
path: root/arch/csky/abiv1/inc
diff options
context:
space:
mode:
authorGuo Ren <guoren@linux.alibaba.com>2020-09-07 09:20:18 +0300
committerGuo Ren <guoren@linux.alibaba.com>2021-01-12 04:52:40 +0300
commit0c8a32eed1625a65798286fb73fea8710a908545 (patch)
tree69992b6e217f5e985ebbf1f739b2af336d89138c /arch/csky/abiv1/inc
parent7c53f6b671f4aba70ff15e1b05148b10d58c2837 (diff)
downloadlinux-0c8a32eed1625a65798286fb73fea8710a908545.tar.xz
csky: Add memory layout 2.5G(user):1.5G(kernel)
There are two ways for translating va to pa for csky: - Use TLB(Translate Lookup Buffer) and PTW (Page Table Walk) - Use SSEG0/1 (Simple Segment Mapping) We use tlb mapping 0-2G and 3G-4G virtual address area and SSEG0/1 are for 2G-2.5G and 2.5G-3G translation. We could disable SSEG0 to use 2G-2.5G as TLB user mapping. Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Diffstat (limited to 'arch/csky/abiv1/inc')
-rw-r--r--arch/csky/abiv1/inc/abi/ckmmu.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/csky/abiv1/inc/abi/ckmmu.h b/arch/csky/abiv1/inc/abi/ckmmu.h
index ba8eb5870835..cceb3afb4c91 100644
--- a/arch/csky/abiv1/inc/abi/ckmmu.h
+++ b/arch/csky/abiv1/inc/abi/ckmmu.h
@@ -89,13 +89,13 @@ static inline void tlb_invalid_indexed(void)
cpwcr("cpcr8", 0x02000000);
}
-static inline void setup_pgd(unsigned long pgd, bool kernel)
+static inline void setup_pgd(pgd_t *pgd)
{
- cpwcr("cpcr29", pgd | BIT(0));
+ cpwcr("cpcr29", __pa(pgd) | BIT(0));
}
-static inline unsigned long get_pgd(void)
+static inline pgd_t *get_pgd(void)
{
- return cprcr("cpcr29") & ~BIT(0);
+ return __va(cprcr("cpcr29") & ~BIT(0));
}
#endif /* __ASM_CSKY_CKMMUV1_H */