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| author | Huacai Chen <chenhuacai@loongson.cn> | 2022-10-12 11:36:14 +0300 |
|---|---|---|
| committer | Huacai Chen <chenhuacai@loongson.cn> | 2022-10-12 11:36:14 +0300 |
| commit | d279134168c78ac2caa1f7cd2a846579da1c93ac (patch) | |
| tree | d77ab5ef3f2ac782823aea728906a7942af1c35a /arch/loongarch/include/asm/fixmap.h | |
| parent | 235d074fdc9a69e3720b8bb6efeb7c6d30c12d8e (diff) | |
| download | linux-d279134168c78ac2caa1f7cd2a846579da1c93ac.tar.xz | |
LoongArch: Use TLB for ioremap()
We can support more cache attributes (e.g., CC, SUC and WUC) and page
protection when we use TLB for ioremap(). The implementation is based
on GENERIC_IOREMAP.
The existing simple ioremap() implementation has better performance so
we keep it and introduce ARCH_IOREMAP to control the selection.
We move pagetable_init() earlier to make early ioremap() works, and we
modify the PCI ecam mapping because the TLB-based version of ioremap()
will actually take the size into account.
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Diffstat (limited to 'arch/loongarch/include/asm/fixmap.h')
| -rw-r--r-- | arch/loongarch/include/asm/fixmap.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/loongarch/include/asm/fixmap.h b/arch/loongarch/include/asm/fixmap.h index b3541dfa2013..d2e55ae55bb9 100644 --- a/arch/loongarch/include/asm/fixmap.h +++ b/arch/loongarch/include/asm/fixmap.h @@ -10,4 +10,19 @@ #define NR_FIX_BTMAPS 64 +enum fixed_addresses { + FIX_HOLE, + FIX_EARLYCON_MEM_BASE, + __end_of_fixed_addresses +}; + +#define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT) +#define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) +#define FIXMAP_PAGE_IO PAGE_KERNEL_SUC + +extern void __set_fixmap(enum fixed_addresses idx, + phys_addr_t phys, pgprot_t flags); + +#include <asm-generic/fixmap.h> + #endif |