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authorBabu Moger <babu.moger@amd.com>2023-01-13 18:20:32 +0300
committerBorislav Petkov (AMD) <bp@alien8.de>2023-01-23 19:38:44 +0300
commit5b6fac3fa44bafee12e0c3d1c5cbae6d058e9c98 (patch)
treeb95060b2a01f615a87aaae98082578d56c27d7e2 /arch/x86/include/asm/msr-index.h
parenta76f65c89f928b87c49d88b7fd60cb4d7203ffff (diff)
downloadlinux-5b6fac3fa44bafee12e0c3d1c5cbae6d058e9c98.tar.xz
x86/resctrl: Detect and configure Slow Memory Bandwidth Allocation
The QoS slow memory configuration details are available via CPUID_Fn80000020_EDX_x02. Detect the available details and initialize the rest to defaults. Signed-off-by: Babu Moger <babu.moger@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Reinette Chatre <reinette.chatre@intel.com> Link: https://lore.kernel.org/r/20230113152039.770054-7-babu.moger@amd.com
Diffstat (limited to 'arch/x86/include/asm/msr-index.h')
-rw-r--r--arch/x86/include/asm/msr-index.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 37ff47552bcb..e0a40027aa62 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -1061,6 +1061,7 @@
/* - AMD: */
#define MSR_IA32_MBA_BW_BASE 0xc0000200
+#define MSR_IA32_SMBA_BW_BASE 0xc0000280
/* MSR_IA32_VMX_MISC bits */
#define MSR_IA32_VMX_MISC_INTEL_PT (1ULL << 14)