diff options
| author | Tomer Tayar <ttayar@habana.ai> | 2023-11-17 13:49:19 +0300 |
|---|---|---|
| committer | Oded Gabbay <ogabbay@kernel.org> | 2023-12-19 12:09:43 +0300 |
| commit | 5bc155cfea605cd64aa372b44a67473b49c4726c (patch) | |
| tree | 534426f99e516053332285ae0b0c297892336bbb /drivers/accel/habanalabs/gaudi2 | |
| parent | 47a552863d6c9ea26abe9ad35d2c35e4d6896551 (diff) | |
| download | linux-5bc155cfea605cd64aa372b44a67473b49c4726c.tar.xz | |
accel/habanalabs/gaudi2: use correct registers to dump QM CQ info
The QM CQ PTR_LO/PTR_HI/TSIZE registers are for pushing a CQ entry, and
although they are updated by HW even when descriptors are fetched by PQ
and CB addresses are fed into CQ, the correct registers to use when
dumping the CQ info are the ones with the _STS suffix.
Signed-off-by: Tomer Tayar <ttayar@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Diffstat (limited to 'drivers/accel/habanalabs/gaudi2')
| -rw-r--r-- | drivers/accel/habanalabs/gaudi2/gaudi2.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/accel/habanalabs/gaudi2/gaudi2.c b/drivers/accel/habanalabs/gaudi2/gaudi2.c index 77c480725a84..bf537c2082cd 100644 --- a/drivers/accel/habanalabs/gaudi2/gaudi2.c +++ b/drivers/accel/habanalabs/gaudi2/gaudi2.c @@ -7868,15 +7868,15 @@ static void handle_lower_qman_data_on_err(struct hl_device *hdev, u64 qman_base, is_arc_cq = FIELD_GET(PDMA0_QM_CP_STS_CUR_CQ_MASK, cp_sts); /* 0 - legacy CQ, 1 - ARC_CQ */ if (is_arc_cq) { - lo = RREG32(qman_base + QM_ARC_CQ_PTR_LO_OFFSET); - hi = RREG32(qman_base + QM_ARC_CQ_PTR_HI_OFFSET); + lo = RREG32(qman_base + QM_ARC_CQ_PTR_LO_STS_OFFSET); + hi = RREG32(qman_base + QM_ARC_CQ_PTR_HI_STS_OFFSET); cq_ptr = ((u64) hi) << 32 | lo; - cq_ptr_size = RREG32(qman_base + QM_ARC_CQ_TSIZE_OFFSET); + cq_ptr_size = RREG32(qman_base + QM_ARC_CQ_TSIZE_STS_OFFSET); } else { - lo = RREG32(qman_base + QM_CQ_PTR_LO_4_OFFSET); - hi = RREG32(qman_base + QM_CQ_PTR_HI_4_OFFSET); + lo = RREG32(qman_base + QM_CQ_PTR_LO_STS_4_OFFSET); + hi = RREG32(qman_base + QM_CQ_PTR_HI_STS_4_OFFSET); cq_ptr = ((u64) hi) << 32 | lo; - cq_ptr_size = RREG32(qman_base + QM_CQ_TSIZE_4_OFFSET); + cq_ptr_size = RREG32(qman_base + QM_CQ_TSIZE_STS_4_OFFSET); } lo = RREG32(qman_base + QM_CP_CURRENT_INST_LO_4_OFFSET); |