diff options
author | Rex-BC Chen <rex-bc.chen@mediatek.com> | 2022-05-23 12:33:33 +0300 |
---|---|---|
committer | Stephen Boyd <sboyd@kernel.org> | 2022-06-16 03:24:12 +0300 |
commit | 2d2a2900588cabe2ff3abd552d1683e5f1ce398b (patch) | |
tree | 2e4a810a5820eb7baeb47f1222225e52197b0508 /drivers/clk/mediatek/clk-mt2712.c | |
parent | 370bf62869695003c2994d3d98769ccde6b26083 (diff) | |
download | linux-2d2a2900588cabe2ff3abd552d1683e5f1ce398b.tar.xz |
clk: mediatek: reset: Revise structure to control reset register
To declare the reset data easier, we add a strucure to do this instead
of using many input variables to mtk_register_reset_controller().
- Add mtk_clk_rst_desc to define the reset description when registering
the reset controller.
- Rename "mtk_reset" to "mtk_clk_rst_data". We use it to store data of
reset controller.
- Document mtk_clk_rst_desc and mtk_clk_rst_data.
- Modify the documentation of mtk_register_reset_controller.
- Extract container_of in update functions to to_mtk_clk_rst_data().
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: NĂcolas F. R. A. Prado <nfraprado@collabora.com>
Tested-by: NĂcolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220523093346.28493-7-rex-bc.chen@mediatek.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/mediatek/clk-mt2712.c')
-rw-r--r-- | drivers/clk/mediatek/clk-mt2712.c | 19 |
1 files changed, 17 insertions, 2 deletions
diff --git a/drivers/clk/mediatek/clk-mt2712.c b/drivers/clk/mediatek/clk-mt2712.c index 3385fc963409..c7a8aafd44cc 100644 --- a/drivers/clk/mediatek/clk-mt2712.c +++ b/drivers/clk/mediatek/clk-mt2712.c @@ -1258,6 +1258,21 @@ static const struct mtk_pll_data plls[] = { 0, 31, 0x0300, 4, 0, 0, 0, 0x0304, 0), }; +static const struct mtk_clk_rst_desc clk_rst_desc[] = { + /* infra */ + { + .version = MTK_RST_SIMPLE, + .rst_bank_nr = 2, + .reg_ofs = 0x30, + }, + /* peri */ + { + .version = MTK_RST_SIMPLE, + .rst_bank_nr = 2, + .reg_ofs = 0x0, + }, +}; + static int clk_mt2712_apmixed_probe(struct platform_device *pdev) { struct clk_hw_onecell_data *clk_data; @@ -1361,7 +1376,7 @@ static int clk_mt2712_infra_probe(struct platform_device *pdev) pr_err("%s(): could not register clock provider: %d\n", __func__, r); - mtk_register_reset_controller(node, 2, 0x30, MTK_RST_SIMPLE); + mtk_register_reset_controller(node, &clk_rst_desc[0]); return r; } @@ -1383,7 +1398,7 @@ static int clk_mt2712_peri_probe(struct platform_device *pdev) pr_err("%s(): could not register clock provider: %d\n", __func__, r); - mtk_register_reset_controller(node, 2, 0, MTK_RST_SIMPLE); + mtk_register_reset_controller(node, &clk_rst_desc[1]); return r; } |