diff options
| author | AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2023-01-20 12:20:35 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2023-01-31 03:45:06 +0300 |
| commit | 01a6c1ab57c3a474c8d23c7d82c3fcce85f62612 (patch) | |
| tree | 7c7dcb2b66566bd3b60ea46d36d90aba33e88693 /drivers/clk/mediatek/clk-mt7622.c | |
| parent | f0b3140f4b81bd8e886f534d9eda43ff5d3382a9 (diff) | |
| download | linux-01a6c1ab57c3a474c8d23c7d82c3fcce85f62612.tar.xz | |
clk: mediatek: clk-mtk: Propagate struct device for composites
Like done for cpumux clocks, propagate struct device for composite
clocks registered through clk-mtk helpers to be able to get runtime
pm support for MTK clocks.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20230120092053.182923-6-angelogioacchino.delregno@collabora.com
Tested-by: Mingming Su <mingming.su@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/mediatek/clk-mt7622.c')
| -rw-r--r-- | drivers/clk/mediatek/clk-mt7622.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/clk/mediatek/clk-mt7622.c b/drivers/clk/mediatek/clk-mt7622.c index a51a6ed9c4b8..5a82c2270bfb 100644 --- a/drivers/clk/mediatek/clk-mt7622.c +++ b/drivers/clk/mediatek/clk-mt7622.c @@ -646,8 +646,9 @@ static int mtk_topckgen_init(struct platform_device *pdev) mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), clk_data); - mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), - base, &mt7622_clk_lock, clk_data); + mtk_clk_register_composites(&pdev->dev, top_muxes, + ARRAY_SIZE(top_muxes), base, + &mt7622_clk_lock, clk_data); mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs), base, &mt7622_clk_lock, clk_data); @@ -723,7 +724,8 @@ static int mtk_pericfg_init(struct platform_device *pdev) mtk_clk_register_gates(&pdev->dev, node, peri_clks, ARRAY_SIZE(peri_clks), clk_data); - mtk_clk_register_composites(peri_muxes, ARRAY_SIZE(peri_muxes), base, + mtk_clk_register_composites(&pdev->dev, peri_muxes, + ARRAY_SIZE(peri_muxes), base, &mt7622_clk_lock, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); |