diff options
| author | Gregory CLEMENT <gregory.clement@free-electrons.com> | 2014-09-02 12:15:16 +0400 |
|---|---|---|
| committer | Jason Cooper <jason@lakedaemon.net> | 2014-09-09 19:14:47 +0400 |
| commit | 15917b16022427c53755abff4dc7051f3076dd7a (patch) | |
| tree | 8912ac27e630e208a38e5c0bf2873db0c6522efb /drivers/clk/mvebu/common.h | |
| parent | 7d1311b93e58ed55f3a31cc8f94c4b8fe988a2b9 (diff) | |
| download | linux-15917b16022427c53755abff4dc7051f3076dd7a.tar.xz | |
clk: mvebu: Fix clk frequency value if SSCG is enabled
When the SSCG (Spread Spectrum Clock Generator) is enabled, it shifts
the frequency of the clock. The percentage is no more than 1% but when
the clock is used for a timer it leads to a clock drift.
This patch allows to correct the affected clock when the SSCG is
enabled. The check is done in an new optional function related to each
SoC: is_sscg_enabled(). The fix is done with the other new optional
function related to each SoC: fix_sscg_deviation. If one these
functions are not present then no correction is done on the clock
frequency.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: Leigh Brown <leigh@solinno.co.uk>
Link: https://lkml.kernel.org/r/1409645719-20003-2-git-send-email-gregory.clement@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'drivers/clk/mvebu/common.h')
| -rw-r--r-- | drivers/clk/mvebu/common.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/clk/mvebu/common.h b/drivers/clk/mvebu/common.h index f968b4d9df92..59efaa850bde 100644 --- a/drivers/clk/mvebu/common.h +++ b/drivers/clk/mvebu/common.h @@ -28,6 +28,8 @@ struct coreclk_soc_desc { u32 (*get_tclk_freq)(void __iomem *sar); u32 (*get_cpu_freq)(void __iomem *sar); void (*get_clk_ratio)(void __iomem *sar, int id, int *mult, int *div); + bool (*is_sscg_enabled)(void __iomem *sar); + u32 (*fix_sscg_deviation)(struct device_node *np, u32 system_clk); const struct coreclk_ratio *ratios; int num_ratios; }; @@ -45,4 +47,9 @@ void __init mvebu_coreclk_setup(struct device_node *np, void __init mvebu_clk_gating_setup(struct device_node *np, const struct clk_gating_soc_desc *desc); +/* + * This function is shared among the Kirkwood, Armada 370, Armada XP + * and Armada 375 SoC + */ +u32 kirkwood_fix_sscg_deviation(struct device_node *np, u32 system_clk); #endif |