summaryrefslogtreecommitdiff
path: root/drivers/clk/qcom/clk-rcg2.c
diff options
context:
space:
mode:
authorStephen Boyd <sboyd@kernel.org>2023-10-27 22:21:17 +0300
committerStephen Boyd <sboyd@kernel.org>2023-10-27 22:21:17 +0300
commit0dea4e30fedad73ce3223b4d3d546fafc1aa77a6 (patch)
tree5a77c64169ea3e9b05d4e3210d18e0f3ca48e578 /drivers/clk/qcom/clk-rcg2.c
parent0bb80ecc33a8fb5a682236443c1e740d5c917d1d (diff)
parente0e6373d653b7707bf042ecf1538884597c5d0da (diff)
downloadlinux-0dea4e30fedad73ce3223b4d3d546fafc1aa77a6.tar.xz
Merge tag 'qcom-clk-for-6.7' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into clk-qcom
Pull Qualcomm clk driver updates from Bjorn Andersson: - Initial support for the SM4450 Global Clock Controller and RPMh clock controllers - Drop CLK_SET_RATE_PARENT for clocks with fixed-rate GPLLs across a variety of IPQ platforms - Add missing parent of APCS PLL on IPQ6018 - Add I2C QUP6 clk on IPQ6018 but mark it critical to avoid problems with RPM - Implement safe source switching for a53pll and use on IPQ5332 - Add support for Stromer Plus PLLs - Switch SM8550 Video and GPU clock controllers to use OLE PLL configure method - Non critical fixes to halt bit checks - Add SMMU GDSC for MSM8998 - Fix possible integer overflow in RCG frequency calculation code - Remove RPM managed clks from MSM8996 GCC driver - Add Camera Clock Controller on SM8550 - Add HFPLL configuration for the three HFPLLs in MSM8976 - Switch MSM8996 CBF clock driver's remove function to return void * tag 'qcom-clk-for-6.7' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (36 commits) clk: qcom: apss-ipq6018: add the GPLL0 clock also as clock provider clk: qcom: ipq5332: drop the CLK_SET_RATE_PARENT flag from GPLL clocks clk: qcom: ipq9574: drop the CLK_SET_RATE_PARENT flag from GPLL clocks clk: qcom: ipq5018: drop the CLK_SET_RATE_PARENT flag from GPLL clocks clk: qcom: ipq6018: drop the CLK_SET_RATE_PARENT flag from PLL clocks clk: qcom: ipq8074: drop the CLK_SET_RATE_PARENT flag from PLL clocks clk: qcom: gcc-ipq6018: add QUP6 I2C clock clk: qcom: apss-ipq6018: ipq5332: add safe source switch for a53pll clk: qcom: apss-ipq-pll: Fix 'l' value for ipq5332_pll_config clk: qcom: apss-ipq-pll: Use stromer plus ops for stromer plus pll clk: qcom: clk-alpha-pll: introduce stromer plus ops clk: qcom: config IPQ_APSS_6018 should depend on QCOM_SMEM clk: qcom: videocc-sm8550: switch to clk_lucid_ole_pll_configure clk: qcom: gpucc-sm8550: switch to clk_lucid_ole_pll_configure clk: qcom: Replace of_device.h with explicit includes clk: qcom: smd-rpm: Move CPUSS_GNoC clock to interconnect clk: qcom: cbf-msm8996: Convert to platform remove callback returning void clk: qcom: gcc-sm8150: Fix gcc_sdcc2_apps_clk_src clk: qcom: Add GCC driver support for SM4450 dt-bindings: clock: qcom: Add GCC clocks for SM4450 ...
Diffstat (limited to 'drivers/clk/qcom/clk-rcg2.c')
-rw-r--r--drivers/clk/qcom/clk-rcg2.c14
1 files changed, 4 insertions, 10 deletions
diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c
index e22baf3a7112..5183c74b074f 100644
--- a/drivers/clk/qcom/clk-rcg2.c
+++ b/drivers/clk/qcom/clk-rcg2.c
@@ -158,17 +158,11 @@ static int clk_rcg2_set_parent(struct clk_hw *hw, u8 index)
static unsigned long
calc_rate(unsigned long rate, u32 m, u32 n, u32 mode, u32 hid_div)
{
- if (hid_div) {
- rate *= 2;
- rate /= hid_div + 1;
- }
+ if (hid_div)
+ rate = mult_frac(rate, 2, hid_div + 1);
- if (mode) {
- u64 tmp = rate;
- tmp *= m;
- do_div(tmp, n);
- rate = tmp;
- }
+ if (mode)
+ rate = mult_frac(rate, m, n);
return rate;
}