diff options
| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2013-05-22 14:20:14 +0400 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2013-05-30 21:31:12 +0400 |
| commit | 611a485b5fac3a6dce32a1ae6ddd3e0df215aecd (patch) | |
| tree | 21772d07ab65ac43d31f46668cae7dd23b29fb88 /drivers/gpio/gpio-langwell.c | |
| parent | 8aca119f561ddb51d407b26f5dacb4f4ce3b3364 (diff) | |
| download | linux-611a485b5fac3a6dce32a1ae6ddd3e0df215aecd.tar.xz | |
gpio-langwell: drop away explicit casting
Since the type of the reg_base member is void __iomem * we don't need to have
explicit casting in gpio_reg() and gpio_reg_2bit().
Update year in the copyright notice as well.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: David Cohen <david.a.cohen@intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio/gpio-langwell.c')
| -rw-r--r-- | drivers/gpio/gpio-langwell.c | 12 |
1 files changed, 4 insertions, 8 deletions
diff --git a/drivers/gpio/gpio-langwell.c b/drivers/gpio/gpio-langwell.c index 313d190c528d..fec85ca89c58 100644 --- a/drivers/gpio/gpio-langwell.c +++ b/drivers/gpio/gpio-langwell.c @@ -1,7 +1,7 @@ /* * Moorestown platform Langwell chip GPIO driver * - * Copyright (c) 2008 - 2009, Intel Corporation. + * Copyright (c) 2008, 2009, 2013, Intel Corporation. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -74,15 +74,13 @@ struct lnw_gpio { #define to_lnw_priv(chip) container_of(chip, struct lnw_gpio, chip) static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset, - enum GPIO_REG reg_type) + enum GPIO_REG reg_type) { struct lnw_gpio *lnw = to_lnw_priv(chip); unsigned nreg = chip->ngpio / 32; u8 reg = offset / 32; - void __iomem *ptr; - ptr = (void __iomem *)(lnw->reg_base + reg_type * nreg * 4 + reg * 4); - return ptr; + return lnw->reg_base + reg_type * nreg * 4 + reg * 4; } static void __iomem *gpio_reg_2bit(struct gpio_chip *chip, unsigned offset, @@ -91,10 +89,8 @@ static void __iomem *gpio_reg_2bit(struct gpio_chip *chip, unsigned offset, struct lnw_gpio *lnw = to_lnw_priv(chip); unsigned nreg = chip->ngpio / 32; u8 reg = offset / 16; - void __iomem *ptr; - ptr = (void __iomem *)(lnw->reg_base + reg_type * nreg * 4 + reg * 4); - return ptr; + return lnw->reg_base + reg_type * nreg * 4 + reg * 4; } static int lnw_gpio_request(struct gpio_chip *chip, unsigned offset) |