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authorSamson Tam <Samson.Tam@amd.com>2024-04-26 19:17:26 +0300
committerAlex Deucher <alexander.deucher@amd.com>2024-05-29 21:39:33 +0300
commit2998bccfa4197ff49bf70cbe14563d1417fe3ccf (patch)
treeb6f8c23477876d9972aa224e01811060c0977389 /drivers/gpu/drm/amd/display/dc/dc.h
parentc2edec1676ca40abf40d1d895765a6cf801decba (diff)
downloadlinux-2998bccfa4197ff49bf70cbe14563d1417fe3ccf.tar.xz
drm/amd/display: Enable ISHARP support for DCN401
[Why] Enable sharpener support for DCN401 [How] - Removed memcmp check that was preventing ISHARP from being enabled. - Add missing ISHARP register defines, masks, and writes. - Add programming of Blur and Scale coefficients. - Program FMT_MODE and NLDELTA registers based on LLS_PREF and pixel - format - Only enable ISHARP for YUV420 - Add disabling of ISHARP - Add debug flags and registry keys for debugging ISHARP. - Set default to medium level Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Samson Tam <Samson.Tam@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dc.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dc.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index a711e3fd6f1b..1055970d3888 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -1040,6 +1040,7 @@ struct dc_debug_options {
unsigned int force_cositing;
unsigned int disable_spl;
unsigned int force_easf;
+ unsigned int force_sharpness;
unsigned int force_lls;
};