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| author | John Harrison <John.C.Harrison@Intel.com> | 2023-02-07 08:07:15 +0300 |
|---|---|---|
| committer | John Harrison <John.C.Harrison@Intel.com> | 2023-02-09 10:34:47 +0300 |
| commit | 1c621f2a21cd519965c6820698345fa14126fec5 (patch) | |
| tree | ca20bc10b5d6fadd7e33f96b0185ff4be0817afd /drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c | |
| parent | 96eecf9beea7603d6ccb5d0baace85fda842ea15 (diff) | |
| download | linux-1c621f2a21cd519965c6820698345fa14126fec5.tar.xz | |
drm/i915/guc: More debug print updates - GuC selftests
Update a bunch more debug prints to use the new GT based scheme.
v2: Also change prints to use %pe for error values (MichalW).
Fix a context leak on error due to a -- being too early.
Use the correct header file for the debug macros.
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230207050717.1833718-5-John.C.Harrison@Intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c')
| -rw-r--r-- | drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c b/drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c index d17982c36d25..a40e7c32e613 100644 --- a/drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c +++ b/drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c @@ -3,6 +3,7 @@ * Copyright �� 2019 Intel Corporation */ +#include "gt/intel_gt_print.h" #include "selftests/igt_spinner.h" #include "selftests/igt_reset.h" #include "selftests/intel_scheduler_helpers.h" @@ -115,30 +116,30 @@ static int __intel_guc_multi_lrc_basic(struct intel_gt *gt, unsigned int class) parent = multi_lrc_create_parent(gt, class, 0); if (IS_ERR(parent)) { - drm_err(>->i915->drm, "Failed creating contexts: %ld", PTR_ERR(parent)); + gt_err(gt, "Failed creating contexts: %pe\n", parent); return PTR_ERR(parent); } else if (!parent) { - drm_dbg(>->i915->drm, "Not enough engines in class: %d", class); + gt_dbg(gt, "Not enough engines in class: %d\n", class); return 0; } rq = multi_lrc_nop_request(parent); if (IS_ERR(rq)) { ret = PTR_ERR(rq); - drm_err(>->i915->drm, "Failed creating requests: %d", ret); + gt_err(gt, "Failed creating requests: %pe\n", rq); goto out; } ret = intel_selftest_wait_for_rq(rq); if (ret) - drm_err(>->i915->drm, "Failed waiting on request: %d", ret); + gt_err(gt, "Failed waiting on request: %pe\n", ERR_PTR(ret)); i915_request_put(rq); if (ret >= 0) { ret = intel_gt_wait_for_idle(gt, HZ * 5); if (ret < 0) - drm_err(>->i915->drm, "GT failed to idle: %d\n", ret); + gt_err(gt, "GT failed to idle: %pe\n", ERR_PTR(ret)); } out: |