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| author | Dave Airlie <airlied@redhat.com> | 2022-11-23 01:03:07 +0300 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2022-11-23 02:15:44 +0300 |
| commit | 3d335a523b938a445a674be24d1dd5c7a4c86fb6 (patch) | |
| tree | 8138ea9225b6831a52356d6014214b894fca2866 /drivers/gpu/drm/i915/i915_drv.h | |
| parent | 242eb7b0a0a27719a674675562f7db1f33e8c885 (diff) | |
| parent | d2eae8e98d5979aa4a767e1cbf53ab9f6a83a38e (diff) | |
| download | linux-3d335a523b938a445a674be24d1dd5c7a4c86fb6.tar.xz | |
Merge tag 'drm-intel-next-2022-11-18' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
GVT Changes:
- gvt-next stuff mostly with refactor for the new MDEV interface.
i915 Changes:
- PSR fixes and improvements (Jouni)
- DP DSC fixes (Vinod, Jouni)
- More general display cleanups (Jani)
- More display collor management cleanup targetting degamma (Ville)
- remove circ_buf.h includes (Jiri)
- wait power off delay at driver remove to optimize probe (Jani)
- More audio cleanup targeting the ELD precompute readout (Ville)
- Enable DC power states on all eDP ports (Imre)
- RPL-P stepping info (Matt Atwood)
- MTL enabling patches (RK)
- Removal of DG2 force_probe (Matt)
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/Y3f71obyEkImXoUF@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 15 |
1 files changed, 0 insertions, 15 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 7e3820d2c404..a380db36d52c 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -284,28 +284,13 @@ struct drm_i915_private { unsigned long gem_quirks; - struct drm_atomic_state *modeset_restore_state; - struct drm_modeset_acquire_ctx reset_ctx; - struct i915_gem_mm mm; - /* Kernel Modesetting */ - - struct list_head global_obj_list; - bool mchbar_need_disable; struct intel_l3_parity l3_parity; /* - * HTI (aka HDPORT) state read during initial hw readout. Most - * platforms don't have HTI, so this will just stay 0. Those that do - * will use this later to figure out which PLLs and PHYs are unavailable - * for driver usage. - */ - u32 hti_state; - - /* * edram size in MB. * Cannot be determined by PCIID. You must always read a register. */ |