diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2015-01-14 08:29:43 +0300 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2015-01-22 05:18:02 +0300 |
commit | e3c71eb27419b600dcacea9f268254369e6550c4 (patch) | |
tree | 10a9e74c710f58a9e6011fd36f2059d300ac6338 /drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c | |
parent | 05c7145dae17a53b030238f477bf28211a21b736 (diff) | |
download | linux-e3c71eb27419b600dcacea9f268254369e6550c4.tar.xz |
drm/nouveau/gr: namespace + nvidia gpu names (no binary change)
The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver. This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).
Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.
A comparison of objdump disassemblies proves no code changes.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c')
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c | 52 |
1 files changed, 22 insertions, 30 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c index e31f6c766729..22a5096e283d 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c @@ -1,35 +1,27 @@ -#include <core/os.h> -#include <core/engctx.h> -#include <core/enum.h> - -#include <subdev/timer.h> -#include <subdev/fb.h> - -#include <engine/gr.h> - #include "nv20.h" #include "regs.h" +#include <engine/fifo.h> + /******************************************************************************* * PGRAPH context ******************************************************************************/ static int -nv2a_gr_context_ctor(struct nouveau_object *parent, - struct nouveau_object *engine, - struct nouveau_oclass *oclass, void *data, u32 size, - struct nouveau_object **pobject) +nv2a_gr_context_ctor(struct nvkm_object *parent, struct nvkm_object *engine, + struct nvkm_oclass *oclass, void *data, u32 size, + struct nvkm_object **pobject) { struct nv20_gr_chan *chan; int ret, i; - ret = nouveau_gr_context_create(parent, engine, oclass, NULL, 0x36b0, - 16, NVOBJ_FLAG_ZERO_ALLOC, &chan); + ret = nvkm_gr_context_create(parent, engine, oclass, NULL, 0x36b0, + 16, NVOBJ_FLAG_ZERO_ALLOC, &chan); *pobject = nv_object(chan); if (ret) return ret; - chan->chid = nouveau_fifo_chan(parent)->chid; + chan->chid = nvkm_fifo_chan(parent)->chid; nv_wo32(chan, 0x0000, 0x00000001 | (chan->chid << 24)); nv_wo32(chan, 0x033c, 0xffff0000); @@ -78,16 +70,16 @@ nv2a_gr_context_ctor(struct nouveau_object *parent, return 0; } -static struct nouveau_oclass +static struct nvkm_oclass nv2a_gr_cclass = { .handle = NV_ENGCTX(GR, 0x2a), - .ofuncs = &(struct nouveau_ofuncs) { + .ofuncs = &(struct nvkm_ofuncs) { .ctor = nv2a_gr_context_ctor, - .dtor = _nouveau_gr_context_dtor, + .dtor = _nvkm_gr_context_dtor, .init = nv20_gr_context_init, .fini = nv20_gr_context_fini, - .rd32 = _nouveau_gr_context_rd32, - .wr32 = _nouveau_gr_context_wr32, + .rd32 = _nvkm_gr_context_rd32, + .wr32 = _nvkm_gr_context_wr32, }, }; @@ -96,20 +88,20 @@ nv2a_gr_cclass = { ******************************************************************************/ static int -nv2a_gr_ctor(struct nouveau_object *parent, struct nouveau_object *engine, - struct nouveau_oclass *oclass, void *data, u32 size, - struct nouveau_object **pobject) +nv2a_gr_ctor(struct nvkm_object *parent, struct nvkm_object *engine, + struct nvkm_oclass *oclass, void *data, u32 size, + struct nvkm_object **pobject) { struct nv20_gr_priv *priv; int ret; - ret = nouveau_gr_create(parent, engine, oclass, true, &priv); + ret = nvkm_gr_create(parent, engine, oclass, true, &priv); *pobject = nv_object(priv); if (ret) return ret; - ret = nouveau_gpuobj_new(nv_object(priv), NULL, 32 * 4, 16, - NVOBJ_FLAG_ZERO_ALLOC, &priv->ctxtab); + ret = nvkm_gpuobj_new(nv_object(priv), NULL, 32 * 4, 16, + NVOBJ_FLAG_ZERO_ALLOC, &priv->ctxtab); if (ret) return ret; @@ -121,13 +113,13 @@ nv2a_gr_ctor(struct nouveau_object *parent, struct nouveau_object *engine, return 0; } -struct nouveau_oclass +struct nvkm_oclass nv2a_gr_oclass = { .handle = NV_ENGINE(GR, 0x2a), - .ofuncs = &(struct nouveau_ofuncs) { + .ofuncs = &(struct nvkm_ofuncs) { .ctor = nv2a_gr_ctor, .dtor = nv20_gr_dtor, .init = nv20_gr_init, - .fini = _nouveau_gr_fini, + .fini = _nvkm_gr_fini, }, }; |