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| author | Christian König <christian.koenig@amd.com> | 2020-09-30 17:44:16 +0300 |
|---|---|---|
| committer | Christian König <christian.koenig@amd.com> | 2020-10-15 13:51:35 +0300 |
| commit | ce65b874001d756294e0b7cf06c51137af964f38 (patch) | |
| tree | 609d12c729903bc175c665ce3cd39ef9b690c234 /drivers/gpu/drm/qxl/qxl_ttm.c | |
| parent | 867bcecd6ae4632e3faf38d381dd5a697b9503d1 (diff) | |
| download | linux-ce65b874001d756294e0b7cf06c51137af964f38.tar.xz | |
drm/ttm: nuke caching placement flags
Changing the caching on the fly never really worked
flawlessly.
So stop this completely and just let drivers specific the
desired caching in the tt or bus object.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
Link: https://patchwork.freedesktop.org/patch/394256/
Diffstat (limited to 'drivers/gpu/drm/qxl/qxl_ttm.c')
| -rw-r--r-- | drivers/gpu/drm/qxl/qxl_ttm.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/qxl/qxl_ttm.c b/drivers/gpu/drm/qxl/qxl_ttm.c index 61eb06dbbce8..e3ed20215f18 100644 --- a/drivers/gpu/drm/qxl/qxl_ttm.c +++ b/drivers/gpu/drm/qxl/qxl_ttm.c @@ -56,7 +56,7 @@ static void qxl_evict_flags(struct ttm_buffer_object *bo, .fpfn = 0, .lpfn = 0, .mem_type = TTM_PL_SYSTEM, - .flags = TTM_PL_MASK_CACHING + .flags = 0 }; if (!qxl_ttm_bo_is_qxl_bo(bo)) { |