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| author | Alex Deucher <alexander.deucher@amd.com> | 2013-11-02 03:01:36 +0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2014-01-09 03:42:22 +0400 |
| commit | de9ae7447aaa2fed8ae4aa9e6b7260915e5b4f7b (patch) | |
| tree | 3866f2fcf1aa0868dc4d9ec53b1bfd5dad50cf74 /drivers/gpu/drm/radeon/r600d.h | |
| parent | 1a0041b8f99656a4600b587a491a1caa0e979e18 (diff) | |
| download | linux-de9ae7447aaa2fed8ae4aa9e6b7260915e5b4f7b.tar.xz | |
drm/radeon: implement pci config reset for r6xx/7xx (v3)
pci config reset is a low level reset that resets
the entire chip from the bus interface. It can
be more reliable if soft reset fails.
There's not much information still available on
r6xx, so r6xx is based on guess-work.
v2: put behind module parameter
v3: add IGP check
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r600d.h')
| -rw-r--r-- | drivers/gpu/drm/radeon/r600d.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h index ebe38724a976..3fca4b9c65ad 100644 --- a/drivers/gpu/drm/radeon/r600d.h +++ b/drivers/gpu/drm/radeon/r600d.h @@ -701,11 +701,18 @@ #define RLC_UCODE_DATA 0x3f30 #define SRBM_SOFT_RESET 0xe60 +# define SOFT_RESET_BIF (1 << 1) # define SOFT_RESET_DMA (1 << 12) # define SOFT_RESET_RLC (1 << 13) # define SOFT_RESET_UVD (1 << 18) # define RV770_SOFT_RESET_DMA (1 << 20) +#define BIF_SCRATCH0 0x5438 + +#define BUS_CNTL 0x5420 +# define BIOS_ROM_DIS (1 << 1) +# define VGA_COHE_SPEC_TIMER_DIS (1 << 9) + #define CP_INT_CNTL 0xc124 # define CNTX_BUSY_INT_ENABLE (1 << 19) # define CNTX_EMPTY_INT_ENABLE (1 << 20) |