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authorAlex Deucher <alexander.deucher@amd.com>2014-01-15 22:41:31 +0400
committerAlex Deucher <alexander.deucher@amd.com>2014-01-21 03:20:52 +0400
commit18f8f52b9a8c293111c058f9d25bcd5e718b80b2 (patch)
tree7884276588256c4ba185f6846a248b1de3fb0140 /drivers/gpu/drm/radeon/radeon_mode.h
parentf5f1f897c892cbff6135cd743df9989ca7bc29e4 (diff)
downloadlinux-18f8f52b9a8c293111c058f9d25bcd5e718b80b2.tar.xz
drm/radeon: handle ss percentage divider properly
It's either 100 or 1000 depending on the flags in the table. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_mode.h')
-rw-r--r--drivers/gpu/drm/radeon/radeon_mode.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index 28bba631b80c..7c53fb1cc46d 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -291,6 +291,7 @@ struct radeon_tv_regs {
struct radeon_atom_ss {
uint16_t percentage;
+ uint16_t percentage_divider;
uint8_t type;
uint16_t step;
uint8_t delay;