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authorJon Hunter <jonathanh@nvidia.com>2016-06-07 18:12:31 +0300
committerMarc Zyngier <marc.zyngier@arm.com>2016-06-13 13:53:52 +0300
commitfaea645585de88303a74171321a9188fd3dd7df5 (patch)
tree9ae09b2d257e514c9fba988f7d48ae2e7a7f0ae5 /drivers/irqchip/irq-gic.c
parentd6ce564cea0c9f8fe7e1b400026482f4e61d38ad (diff)
downloadlinux-faea645585de88303a74171321a9188fd3dd7df5.tar.xz
irqchip/gic: Add helper function for chip initialisation
For GICs that require runtime power-management it is necessary to populate the 'parent_device' member of the irqchip structure. In preparation for supporting such GICs, move the code that initialises the irqchip structure for a GIC into its own function called gic_init_chip() where the parent device pointer is also set. Instead of calling gic_init_chip() from within gic_init_bases(), move the calls to outside of this function, so that in the future we can avoid having to pass additional parameters to gic_init_bases() in order set the parent device pointer or set the name to a specific string. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'drivers/irqchip/irq-gic.c')
-rw-r--r--drivers/irqchip/irq-gic.c41
1 files changed, 27 insertions, 14 deletions
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index fa0dd98993fa..94eab6e23124 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -1032,29 +1032,31 @@ static const struct irq_domain_ops gic_irq_domain_ops = {
.unmap = gic_irq_domain_unmap,
};
-static int gic_init_bases(struct gic_chip_data *gic, int irq_start,
- struct fwnode_handle *handle)
+static void gic_init_chip(struct gic_chip_data *gic, struct device *dev,
+ const char *name, bool use_eoimode1)
{
- irq_hw_number_t hwirq_base;
- int gic_irqs, irq_base, ret;
-
/* Initialize irq_chip */
gic->chip = gic_chip;
+ gic->chip.name = name;
+ gic->chip.parent_device = dev;
- if (static_key_true(&supports_deactivate) && gic == &gic_data[0]) {
+ if (use_eoimode1) {
gic->chip.irq_mask = gic_eoimode1_mask_irq;
gic->chip.irq_eoi = gic_eoimode1_eoi_irq;
gic->chip.irq_set_vcpu_affinity = gic_irq_set_vcpu_affinity;
- gic->chip.name = kasprintf(GFP_KERNEL, "GICv2");
- } else {
- gic->chip.name = kasprintf(GFP_KERNEL, "GIC-%d",
- (int)(gic - &gic_data[0]));
}
#ifdef CONFIG_SMP
if (gic == &gic_data[0])
gic->chip.irq_set_affinity = gic_set_affinity;
#endif
+}
+
+static int gic_init_bases(struct gic_chip_data *gic, int irq_start,
+ struct fwnode_handle *handle)
+{
+ irq_hw_number_t hwirq_base;
+ int gic_irqs, irq_base, ret;
if (IS_ENABLED(CONFIG_GIC_NON_BANKED) && gic->percpu_offset) {
/* Frankein-GIC without banked registers... */
@@ -1152,8 +1154,6 @@ error:
free_percpu(gic->cpu_base.percpu_base);
}
- kfree(gic->chip.name);
-
return ret;
}
@@ -1161,7 +1161,8 @@ static int __init __gic_init_bases(struct gic_chip_data *gic,
int irq_start,
struct fwnode_handle *handle)
{
- int i;
+ char *name;
+ int i, ret;
if (WARN_ON(!gic || gic->domain))
return -EINVAL;
@@ -1183,7 +1184,19 @@ static int __init __gic_init_bases(struct gic_chip_data *gic,
pr_info("GIC: Using split EOI/Deactivate mode\n");
}
- return gic_init_bases(gic, irq_start, handle);
+ if (static_key_true(&supports_deactivate) && gic == &gic_data[0]) {
+ name = kasprintf(GFP_KERNEL, "GICv2");
+ gic_init_chip(gic, NULL, name, true);
+ } else {
+ name = kasprintf(GFP_KERNEL, "GIC-%d", (int)(gic-&gic_data[0]));
+ gic_init_chip(gic, NULL, name, false);
+ }
+
+ ret = gic_init_bases(gic, irq_start, handle);
+ if (ret)
+ kfree(name);
+
+ return ret;
}
void __init gic_init(unsigned int gic_nr, int irq_start,