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authorSeungwon Jeon <tgih.jun@samsung.com>2014-03-14 16:11:56 +0400
committerChris Ball <chris@printf.net>2014-04-21 00:59:28 +0400
commit79f7ae7c45a6ccf04e2908337461dee615f6afb0 (patch)
treed1fd1856fff504aeaa94782ff9e8ac47e36f0dcb /drivers/mmc/core/debugfs.c
parenta798c10faf62a505d24e5f6213fbaf904a39623f (diff)
downloadlinux-79f7ae7c45a6ccf04e2908337461dee615f6afb0.tar.xz
mmc: clarify DDR timing mode between SD-UHS and eMMC
This change distinguishes DDR timing mode of current mixed usage to clarify device type. Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net>
Diffstat (limited to 'drivers/mmc/core/debugfs.c')
-rw-r--r--drivers/mmc/core/debugfs.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/mmc/core/debugfs.c b/drivers/mmc/core/debugfs.c
index 54829c0ed000..509229b48b55 100644
--- a/drivers/mmc/core/debugfs.c
+++ b/drivers/mmc/core/debugfs.c
@@ -135,6 +135,9 @@ static int mmc_ios_show(struct seq_file *s, void *data)
case MMC_TIMING_UHS_DDR50:
str = "sd uhs DDR50";
break;
+ case MMC_TIMING_MMC_DDR52:
+ str = "mmc DDR52";
+ break;
case MMC_TIMING_MMC_HS200:
str = "mmc high-speed SDR200";
break;