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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2017-05-09 20:21:17 +0300
committerUlf Hansson <ulf.hansson@linaro.org>2017-06-20 11:30:08 +0300
commitef4b160f280f81cab477ba733177c3a658e60a1c (patch)
tree13630ce892838d09e25a66efe5b84d0b6412412b /drivers/mmc/host/atmel-mci.c
parent675a7da857146338d047d1a63247bb48e7d5fed5 (diff)
downloadlinux-ef4b160f280f81cab477ba733177c3a658e60a1c.tar.xz
mmc: atmel-mci: Remove AVR32 bits from the driver
AVR32 is gone. Now it's time to clean up the driver by removing leftovers that was used by AVR32 related code. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc/host/atmel-mci.c')
-rw-r--r--drivers/mmc/host/atmel-mci.c24
1 files changed, 2 insertions, 22 deletions
diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c
index 388e4a3f13e6..2e96d964f582 100644
--- a/drivers/mmc/host/atmel-mci.c
+++ b/drivers/mmc/host/atmel-mci.c
@@ -44,7 +44,7 @@
#include <asm/unaligned.h>
/*
- * Superset of MCI IP registers integrated in Atmel AVR32 and AT91 Processors
+ * Superset of MCI IP registers integrated in Atmel AT91 Processor
* Registers and bitfields marked with [2] are only available in MCI2
*/
@@ -172,13 +172,6 @@
#define atmci_writel(port, reg, value) \
__raw_writel((value), (port)->regs + reg)
-/* On AVR chips the Peripheral DMA Controller is not connected to MCI. */
-#ifdef CONFIG_AVR32
-# define ATMCI_PDC_CONNECTED 0
-#else
-# define ATMCI_PDC_CONNECTED 1
-#endif
-
#define AUTOSUSPEND_DELAY 50
#define ATMCI_DATA_ERROR_FLAGS (ATMCI_DCRCE | ATMCI_DTOE | ATMCI_OVRE | ATMCI_UNRE)
@@ -1549,21 +1542,8 @@ static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, ios->vdd);
break;
default:
- /*
- * TODO: None of the currently available AVR32-based
- * boards allow MMC power to be turned off. Implement
- * power control when this can be tested properly.
- *
- * We also need to hook this into the clock management
- * somehow so that newly inserted cards aren't
- * subjected to a fast clock before we have a chance
- * to figure out what the maximum rate is. Currently,
- * there's no way to avoid this, and there never will
- * be for boards that don't support power control.
- */
break;
}
-
}
static int atmci_get_ro(struct mmc_host *mmc)
@@ -2464,7 +2444,7 @@ static void atmci_get_cap(struct atmel_mci *host)
"version: 0x%x\n", version);
host->caps.has_dma_conf_reg = 0;
- host->caps.has_pdc = ATMCI_PDC_CONNECTED;
+ host->caps.has_pdc = 1;
host->caps.has_cfg_reg = 0;
host->caps.has_cstor_reg = 0;
host->caps.has_highspeed = 0;