diff options
author | Mark Starovoytov <mstarovoitov@marvell.com> | 2020-05-22 11:19:46 +0300 |
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committer | David S. Miller <davem@davemloft.net> | 2020-05-23 00:08:29 +0300 |
commit | b64f2ac9955bcd3547329c30d8f7a55f84297df8 (patch) | |
tree | 62315f5f3681af1b76e915f137745886c88b5d67 /drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c | |
parent | 5479e8436f32cdbe76d63119459a7d651c1c39ed (diff) | |
download | linux-b64f2ac9955bcd3547329c30d8f7a55f84297df8.tar.xz |
net: atlantic: change the order of arguments for TC weight/credit setters
This patch changes the order of arguments for TC weight/credit setter
functions.
Having the "value to be set" on the right is slightly more robust in
a sense that it's more natural for the humans, so it's a bit more
error-proof this way.
Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c')
-rw-r--r-- | drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c index abc86eb4f525..2448a09ef7b9 100644 --- a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c +++ b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c @@ -161,8 +161,8 @@ static int hw_atl_b0_hw_qos_set(struct aq_hw_s *self) u32 threshold = 0U; /* TX Packet Scheduler Data TC0 */ - hw_atl_tps_tx_pkt_shed_tc_data_max_credit_set(self, 0xFFF, tc); - hw_atl_tps_tx_pkt_shed_tc_data_weight_set(self, 0x64, tc); + hw_atl_tps_tx_pkt_shed_tc_data_max_credit_set(self, tc, 0xFFF); + hw_atl_tps_tx_pkt_shed_tc_data_weight_set(self, tc, 0x64); /* Tx buf size TC0 */ hw_atl_tpb_tx_pkt_buff_size_per_tc_set(self, tx_buff_size, tc); @@ -334,8 +334,8 @@ int hw_atl_b0_hw_init_tx_tc_rate_limit(struct aq_hw_s *self) const u32 en = (nic_cfg->tc_max_rate[tc] != 0) ? 1U : 0U; const u32 desc = AQ_NIC_CFG_TCVEC2RING(nic_cfg, tc, 0); - hw_atl_tps_tx_pkt_shed_desc_tc_max_credit_set(self, 0x50, tc); - hw_atl_tps_tx_pkt_shed_desc_tc_weight_set(self, 0x1E, tc); + hw_atl_tps_tx_pkt_shed_desc_tc_max_credit_set(self, tc, 0x50); + hw_atl_tps_tx_pkt_shed_desc_tc_weight_set(self, tc, 0x1E); hw_atl_tps_tx_desc_rate_en_set(self, desc, en); |