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authorRakesh Babu Saladi <rsaladi2@marvell.com>2022-12-05 10:05:18 +0300
committerPaolo Abeni <pabeni@redhat.com>2022-12-07 14:24:29 +0300
commitf2e664ad503d4e5ce7c42a0862ab164331a0ef37 (patch)
treef841d14f4f8d6dfd24df092a718333624dabdbb0 /drivers/net/ethernet/marvell/octeontx2/af/rvu.h
parentf82389eecdd24a50f0d33d58127aeacc48d53511 (diff)
downloadlinux-f2e664ad503d4e5ce7c42a0862ab164331a0ef37.tar.xz
octeontx2-af: Support variable number of lmacs
Most of the code in CGX/RPM driver assumes that max lmacs per given MAC as always, 4 and the number of MAC blocks also as 4. With this assumption, the max number of interfaces supported is hardcoded to 16. This creates a problem as next gen CN10KB silicon MAC supports 8 lmacs per MAC block. This patch solves the problem by using "max lmac per MAC block" value from constant csrs and uses cgx_cnt_max value which is populated based number of MAC blocks supported by silicon. Signed-off-by: Rakesh Babu Saladi <rsaladi2@marvell.com> Signed-off-by: Hariprasad Kelam <hkelam@marvell.com> Signed-off-by: Sunil Kovvuri Goutham <sgoutham@marvell.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Diffstat (limited to 'drivers/net/ethernet/marvell/octeontx2/af/rvu.h')
-rw-r--r--drivers/net/ethernet/marvell/octeontx2/af/rvu.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
index f718cbd32a94..04333f127282 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
@@ -478,7 +478,7 @@ struct rvu {
u8 cgx_mapped_pfs;
u8 cgx_cnt_max; /* CGX port count max */
u8 *pf2cgxlmac_map; /* pf to cgx_lmac map */
- u16 *cgxlmac2pf_map; /* bitmap of mapped pfs for
+ u64 *cgxlmac2pf_map; /* bitmap of mapped pfs for
* every cgx lmac port
*/
unsigned long pf_notify_bmap; /* Flags for PF notification */