diff options
| author | Maxim Mikityanskiy <maximmi@nvidia.com> | 2021-04-05 20:53:08 +0300 |
|---|---|---|
| committer | Saeed Mahameed <saeedm@nvidia.com> | 2021-07-26 19:50:39 +0300 |
| commit | 0570c1c958178113bf0e35a00f1398c63fed9644 (patch) | |
| tree | 4ab2d36030737e1b9c7274ce6a0ec1c3195069af /drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c | |
| parent | 3f22d6c77bb91b3429814c3baae91903c8cf7f90 (diff) | |
| download | linux-0570c1c958178113bf0e35a00f1398c63fed9644.tar.xz | |
net/mlx5e: Take RQT out of TIR and group RX resources
RQT is not part of TIR, as multiple TIRs may point to the same RQT, as
it happens with indir_tir and inner_indir_tir. These instances of a TIR
don't use the embedded RQT.
This commit takes RQT out of TIR, making them independent. The RQTs are
placed into struct mlx5e_rx_res, and items in that struct are regrouped
by functionality: RSS, channels and PTP.
Signed-off-by: Maxim Mikityanskiy <maximmi@nvidia.com>
Reviewed-by: Tariq Toukan <tariqt@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c')
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c b/drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c index b30967a316d1..32edb9119d38 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c @@ -421,12 +421,9 @@ add_ethtool_flow_rule(struct mlx5e_priv *priv, } else { struct mlx5e_params *params = &priv->channels.params; enum mlx5e_rq_group group; - struct mlx5e_tir *tir; u16 ix; mlx5e_qid_get_ch_and_group(params, fs->ring_cookie, &ix, &group); - tir = group == MLX5E_RQ_GROUP_XSK ? priv->rx_res->xsk_tirs : - priv->rx_res->direct_tirs; dst = kzalloc(sizeof(*dst), GFP_KERNEL); if (!dst) { @@ -435,7 +432,10 @@ add_ethtool_flow_rule(struct mlx5e_priv *priv, } dst->type = MLX5_FLOW_DESTINATION_TYPE_TIR; - dst->tir_num = tir[ix].tirn; + if (group == MLX5E_RQ_GROUP_XSK) + dst->tir_num = priv->rx_res->channels[ix].xsk_tir.tirn; + else + dst->tir_num = priv->rx_res->channels[ix].direct_tir.tirn; flow_act.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST; } |