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| author | Ilkka Koskinen <ilkka@os.amperecomputing.com> | 2023-09-14 02:39:41 +0300 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2023-10-10 21:10:54 +0300 |
| commit | 53a810ad3c5cde674cac71e629e6d10bfc9d838c (patch) | |
| tree | bcda97e76425d6be5570bb26e3e6d19afd4c9f11 /drivers/perf/arm_cspmu/arm_cspmu.h | |
| parent | 647d5c5a9e7672e285f54f0e141ee759e69382f2 (diff) | |
| download | linux-53a810ad3c5cde674cac71e629e6d10bfc9d838c.tar.xz | |
perf: arm_cspmu: ampere_cspmu: Add support for Ampere SoC PMU
Ampere SoC PMU follows CoreSight PMU architecture. It uses implementation
specific registers to filter events rather than PMEVFILTnR registers.
Signed-off-by: Ilkka Koskinen <ilkka@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20230913233941.9814-5-ilkka@os.amperecomputing.com
[will: Include linux/io.h in ampere_cspmu.c for writel()]
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'drivers/perf/arm_cspmu/arm_cspmu.h')
| -rw-r--r-- | drivers/perf/arm_cspmu/arm_cspmu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/perf/arm_cspmu/arm_cspmu.h b/drivers/perf/arm_cspmu/arm_cspmu.h index a30c8372214c..2fe723555a6b 100644 --- a/drivers/perf/arm_cspmu/arm_cspmu.h +++ b/drivers/perf/arm_cspmu/arm_cspmu.h @@ -71,6 +71,7 @@ /* JEDEC-assigned JEP106 identification code */ #define ARM_CSPMU_IMPL_ID_NVIDIA 0x36B +#define ARM_CSPMU_IMPL_ID_AMPERE 0xA16 struct arm_cspmu; |