diff options
| author | Fabrice Gasnier <fabrice.gasnier@foss.st.com> | 2022-11-23 16:36:52 +0300 |
|---|---|---|
| committer | Thierry Reding <thierry.reding@gmail.com> | 2023-01-30 18:42:45 +0300 |
| commit | 3066bc2d58be31275afb51a589668f265e419c37 (patch) | |
| tree | 03bd6473d105227c188949af5a3fa754a0457642 /drivers/pwm | |
| parent | b3c650ad9bb88ecf36b9aeacf9e7eb7478258da7 (diff) | |
| download | linux-3066bc2d58be31275afb51a589668f265e419c37.tar.xz | |
pwm: stm32-lp: fix the check on arr and cmp registers update
The ARR (auto reload register) and CMP (compare) registers are
successively written. The status bits to check the update of these
registers are polled together with regmap_read_poll_timeout().
The condition to end the loop may become true, even if one of the
register isn't correctly updated.
So ensure both status bits are set before clearing them.
Fixes: e70a540b4e02 ("pwm: Add STM32 LPTimer PWM driver")
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'drivers/pwm')
| -rw-r--r-- | drivers/pwm/pwm-stm32-lp.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pwm/pwm-stm32-lp.c b/drivers/pwm/pwm-stm32-lp.c index 514ff58a4471..f315fa106be8 100644 --- a/drivers/pwm/pwm-stm32-lp.c +++ b/drivers/pwm/pwm-stm32-lp.c @@ -127,7 +127,7 @@ static int stm32_pwm_lp_apply(struct pwm_chip *chip, struct pwm_device *pwm, /* ensure CMP & ARR registers are properly written */ ret = regmap_read_poll_timeout(priv->regmap, STM32_LPTIM_ISR, val, - (val & STM32_LPTIM_CMPOK_ARROK), + (val & STM32_LPTIM_CMPOK_ARROK) == STM32_LPTIM_CMPOK_ARROK, 100, 1000); if (ret) { dev_err(priv->chip.dev, "ARR/CMP registers write issue\n"); |