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authorLinus Torvalds <torvalds@linux-foundation.org>2023-04-27 21:02:26 +0300
committerLinus Torvalds <torvalds@linux-foundation.org>2023-04-27 21:02:26 +0300
commitfc2e58b8b7c94b8fe23977775550de00472f6a74 (patch)
tree671340da3038bdabb6381f350ad9dd2b95ccd43c /drivers/spi/spi.c
parent1c15ca4e4efaddb78f83eed31eeee34c522c3ae2 (diff)
parentcc5f6fa4f6590e3b9eb8d34302ea43af4a3cfed7 (diff)
downloadlinux-fc2e58b8b7c94b8fe23977775550de00472f6a74.tar.xz
Merge tag 'spi-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown: "A fairly standard release for SPI with the exception of a change to the API for specifying chip selects done in preparation for supporting devices with more than one chip select, this required some mechanical changes throughout the tree which have been cooking in -next happily for a while. There's also a new API to allow us to support TPM chips on half duplex controllers. Summary: - Refactoring in preparation for supporting multiple chip selects for a single device, needed by some flash devices, which required a change in the SPI device API visible throughout the tree - Support for hardware assisted interaction with SPI TPMs on half duplex controllers, implemented on nVidia Tedra210 QuadSPI - Optimisation for large transfers on fsl-cpm devices - Cleanups around device property use which fix some sisues with fwnode - Use of both void remove() and devm_platform_.*ioremap_resource() - Support for AMD Pensando Elba, Amlogic A1, Cadence device mode, Intel MetorLake-S and StarFive J7110 QuadSPI" * tag 'spi-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (185 commits) spi: bcm63xx: use macro DEFINE_SIMPLE_DEV_PM_OPS spi: tegra210-quad: Enable TPM wait polling spi: Add TPM HW flow flag spi: bcm63xx: remove PM_SLEEP based conditional compilation spi: cadence-quadspi: use macro DEFINE_SIMPLE_DEV_PM_OPS spi: spi-cadence: Add support for Slave mode spi: spi-cadence: Switch to spi_controller structure spi: cadence-quadspi: fix suspend-resume implementations spi: dw: Add support for AMD Pensando Elba SoC spi: dw: Add AMD Pensando Elba SoC SPI Controller spi: cadence-quadspi: Disable the SPI before reconfiguring spi: cadence-quadspi: Update the read timeout based on the length spi: spi-loopback-test: Add module param for iteration length spi: add support for Amlogic A1 SPI Flash Controller dt-bindings: spi: add Amlogic A1 SPI controller spi: fsl-spi: No need to check transfer length versus word size spi: fsl-spi: Change mspi_apply_cpu_mode_quirks() to void spi: fsl-cpm: Use 16 bit mode for large transfers with even size spi: fsl-spi: Re-organise transfer bits_per_word adaptation spi: fsl-spi: Fix CPM/QE mode Litte Endian ...
Diffstat (limited to 'drivers/spi/spi.c')
-rw-r--r--drivers/spi/spi.c102
1 files changed, 76 insertions, 26 deletions
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 7bc14fb309a6..a1ad8f41fb86 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -117,24 +117,28 @@ static struct spi_statistics __percpu *spi_alloc_pcpu_stats(struct device *dev)
return pcpu_stats;
}
-#define spi_pcpu_stats_totalize(ret, in, field) \
-do { \
- int i; \
- ret = 0; \
- for_each_possible_cpu(i) { \
- const struct spi_statistics *pcpu_stats; \
- u64 inc; \
- unsigned int start; \
- pcpu_stats = per_cpu_ptr(in, i); \
- do { \
- start = u64_stats_fetch_begin( \
- &pcpu_stats->syncp); \
- inc = u64_stats_read(&pcpu_stats->field); \
- } while (u64_stats_fetch_retry( \
- &pcpu_stats->syncp, start)); \
- ret += inc; \
- } \
-} while (0)
+static ssize_t spi_emit_pcpu_stats(struct spi_statistics __percpu *stat,
+ char *buf, size_t offset)
+{
+ u64 val = 0;
+ int i;
+
+ for_each_possible_cpu(i) {
+ const struct spi_statistics *pcpu_stats;
+ u64_stats_t *field;
+ unsigned int start;
+ u64 inc;
+
+ pcpu_stats = per_cpu_ptr(stat, i);
+ field = (void *)pcpu_stats + offset;
+ do {
+ start = u64_stats_fetch_begin(&pcpu_stats->syncp);
+ inc = u64_stats_read(field);
+ } while (u64_stats_fetch_retry(&pcpu_stats->syncp, start));
+ val += inc;
+ }
+ return sysfs_emit(buf, "%llu\n", val);
+}
#define SPI_STATISTICS_ATTRS(field, file) \
static ssize_t spi_controller_##field##_show(struct device *dev, \
@@ -165,11 +169,8 @@ static struct device_attribute dev_attr_spi_device_##field = { \
static ssize_t spi_statistics_##name##_show(struct spi_statistics __percpu *stat, \
char *buf) \
{ \
- ssize_t len; \
- u64 val; \
- spi_pcpu_stats_totalize(val, stat, field); \
- len = sysfs_emit(buf, "%llu\n", val); \
- return len; \
+ return spi_emit_pcpu_stats(stat, buf, \
+ offsetof(struct spi_statistics, field)); \
} \
SPI_STATISTICS_ATTRS(name, file)
@@ -2367,8 +2368,8 @@ of_register_spi_device(struct spi_controller *ctlr, struct device_node *nc)
/* Store a pointer to the node in the device structure */
of_node_get(nc);
- spi->dev.of_node = nc;
- spi->dev.fwnode = of_fwnode_handle(nc);
+
+ device_set_node(&spi->dev, of_fwnode_handle(nc));
/* Register the new device */
rc = spi_add_device(spi);
@@ -3075,7 +3076,7 @@ static int spi_controller_check_ops(struct spi_controller *ctlr)
* If ->mem_ops or ->mem_ops->exec_op is NULL, we request that at least
* one of the ->transfer_xxx() method be implemented.
*/
- if (!ctlr->mem_ops || (ctlr->mem_ops && !ctlr->mem_ops->exec_op)) {
+ if (!ctlr->mem_ops || !ctlr->mem_ops->exec_op) {
if (!ctlr->transfer && !ctlr->transfer_one &&
!ctlr->transfer_one_message) {
return -EINVAL;
@@ -3621,6 +3622,55 @@ int spi_split_transfers_maxsize(struct spi_controller *ctlr,
}
EXPORT_SYMBOL_GPL(spi_split_transfers_maxsize);
+
+/**
+ * spi_split_transfers_maxwords - split spi transfers into multiple transfers
+ * when an individual transfer exceeds a
+ * certain number of SPI words
+ * @ctlr: the @spi_controller for this transfer
+ * @msg: the @spi_message to transform
+ * @maxwords: the number of words to limit each transfer to
+ * @gfp: GFP allocation flags
+ *
+ * Return: status of transformation
+ */
+int spi_split_transfers_maxwords(struct spi_controller *ctlr,
+ struct spi_message *msg,
+ size_t maxwords,
+ gfp_t gfp)
+{
+ struct spi_transfer *xfer;
+
+ /*
+ * Iterate over the transfer_list,
+ * but note that xfer is advanced to the last transfer inserted
+ * to avoid checking sizes again unnecessarily (also xfer does
+ * potentially belong to a different list by the time the
+ * replacement has happened).
+ */
+ list_for_each_entry(xfer, &msg->transfers, transfer_list) {
+ size_t maxsize;
+ int ret;
+
+ if (xfer->bits_per_word <= 8)
+ maxsize = maxwords;
+ else if (xfer->bits_per_word <= 16)
+ maxsize = 2 * maxwords;
+ else
+ maxsize = 4 * maxwords;
+
+ if (xfer->len > maxsize) {
+ ret = __spi_split_transfer_maxsize(ctlr, msg, &xfer,
+ maxsize, gfp);
+ if (ret)
+ return ret;
+ }
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(spi_split_transfers_maxwords);
+
/*-------------------------------------------------------------------------*/
/* Core methods for SPI controller protocol drivers. Some of the