diff options
| author | Suresh Gupta <B42813@freescale.com> | 2019-06-24 10:22:16 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-07-03 19:52:20 +0300 |
| commit | 5dfff995f9cb21c2910e40f5d4da53473356a792 (patch) | |
| tree | 92c692395379b592d35230299c103a375d211284 /drivers/usb/host/ehci-fsl.h | |
| parent | 4f182835508c2d3dc6f5cc0e56b65b4c1ca325f8 (diff) | |
| download | linux-5dfff995f9cb21c2910e40f5d4da53473356a792.tar.xz | |
usb: phy: Workaround for USB erratum-A005728
PHY_CLK_VALID bit for UTMI PHY in USBDR does not set even
if PHY is providing valid clock. Workaround for this
involves resetting of PHY and check PHY_CLK_VALID bit
multiple times. If PHY_CLK_VALID bit is still not set even
after 5 retries, it would be safe to deaclare that PHY
clock is not available.
This erratum is applicable for USBDR less then ver 2.4.
Signed-off-by: Suresh Gupta <B42813@freescale.com>
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Link: https://lore.kernel.org/r/20190624072219.15258-2-yinbo.zhu@nxp.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/usb/host/ehci-fsl.h')
| -rw-r--r-- | drivers/usb/host/ehci-fsl.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h index cbc422032e50..9d18c6e6ab27 100644 --- a/drivers/usb/host/ehci-fsl.h +++ b/drivers/usb/host/ehci-fsl.h @@ -50,4 +50,7 @@ #define UTMI_PHY_EN (1<<9) #define ULPI_PHY_CLK_SEL (1<<10) #define PHY_CLK_VALID (1<<17) + +/* Retry count for checking UTMI PHY CLK validity */ +#define UTMI_PHY_CLK_VALID_CHK_RETRY 5 #endif /* _EHCI_FSL_H */ |