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| author | Shengjiu Wang <shengjiu.wang@nxp.com> | 2022-07-01 12:32:39 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2022-07-05 15:00:40 +0300 |
| commit | 7cb7f07d2491a3435578ab97eeeb70fadac6385c (patch) | |
| tree | 42dfe879508041247ff0ef0d3fe34b27a3880f82 /sound/soc/fsl/fsl_sai.h | |
| parent | 93f54100fbdedc22e8d88d037a8a3e32101724eb (diff) | |
| download | linux-7cb7f07d2491a3435578ab97eeeb70fadac6385c.tar.xz | |
ASoC: fsl_sai: Add support for PLL switch at runtime
i.MX8MQ/MN/MM/MP platforms typically have 2 AUDIO PLLs being
configured to handle 8kHz and 11kHz series audio rates.
The patch implements the functionality to select at runtime
the appropriate AUDIO PLL as function of sysclk rate.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Link: https://lore.kernel.org/r/1656667961-1799-5-git-send-email-shengjiu.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/fsl/fsl_sai.h')
| -rw-r--r-- | sound/soc/fsl/fsl_sai.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h index 9bb8ced520c8..17956b5731dc 100644 --- a/sound/soc/fsl/fsl_sai.h +++ b/sound/soc/fsl/fsl_sai.h @@ -273,6 +273,8 @@ struct fsl_sai { struct regmap *regmap; struct clk *bus_clk; struct clk *mclk_clk[FSL_SAI_MCLK_MAX]; + struct clk *pll8k_clk; + struct clk *pll11k_clk; struct resource *res; bool is_consumer_mode; |