diff options
| author | Cezary Rojewski <cezary.rojewski@intel.com> | 2019-07-23 17:58:50 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2019-07-24 21:42:09 +0300 |
| commit | f2a167ca681d21aa46f127032cc005879c328823 (patch) | |
| tree | dc0e87bd791f97dc1049a6eb9ee77a4fd561c983 /sound/soc/intel/skylake/skl.h | |
| parent | 88abcc90cb04cbabcc3e384e8d3431a49f56a2b3 (diff) | |
| download | linux-f2a167ca681d21aa46f127032cc005879c328823.tar.xz | |
ASoC: Intel: Skylake: Remove MCPS available check
The entire logic for MCPS calculation and DSP scheduling is found
within DSP firmware. Currently driver implements simplistic, inaccurate
logic itself which may prevent pipeline creation despite firmware being
completely fine its parameters.
Remove that logic and leave the MCPS calculation to DSP alone.
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20190723145854.8527-4-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/intel/skylake/skl.h')
| -rw-r--r-- | sound/soc/intel/skylake/skl.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/sound/soc/intel/skylake/skl.h b/sound/soc/intel/skylake/skl.h index d3d84f4125d9..21c33c1af934 100644 --- a/sound/soc/intel/skylake/skl.h +++ b/sound/soc/intel/skylake/skl.h @@ -42,9 +42,7 @@ #define AZX_REG_VS_EM2_L1SEN BIT(13) struct skl_dsp_resource { - u32 max_mcps; u32 max_mem; - u32 mcps; u32 mem; }; |