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path: root/drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h
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Diffstat (limited to 'drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h')
-rw-r--r--drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h
index 075867d4b1da..18d34bbceebe 100644
--- a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h
+++ b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h
@@ -21,7 +21,10 @@
#ifndef _gc_10_1_0_OFFSET_HEADER
#define _gc_10_1_0_OFFSET_HEADER
-
+#define mmSQ_DEBUG_STS_GLOBAL 0x10A9
+#define mmSQ_DEBUG_STS_GLOBAL_BASE_IDX 0
+#define mmSQ_DEBUG_STS_GLOBAL2 0x10B0
+#define mmSQ_DEBUG_STS_GLOBAL2_BASE_IDX 0
// addressBlock: gc_sdma0_sdma0dec
// base address: 0x4980
@@ -11151,6 +11154,7 @@
// addressBlock: sqind
// base address: 0x0
+#define ixSQ_DEBUG_STS_LOCAL 0x0008
#define ixSQ_WAVE_MODE 0x0101
#define ixSQ_WAVE_STATUS 0x0102
#define ixSQ_WAVE_TRAPSTS 0x0103