diff options
Diffstat (limited to 'drivers/media/platform/amphion/vpu_malone.c')
| -rw-r--r-- | drivers/media/platform/amphion/vpu_malone.c | 45 |
1 files changed, 44 insertions, 1 deletions
diff --git a/drivers/media/platform/amphion/vpu_malone.c b/drivers/media/platform/amphion/vpu_malone.c index 2c9bfc6a5a72..ef44bff9fbaf 100644 --- a/drivers/media/platform/amphion/vpu_malone.c +++ b/drivers/media/platform/amphion/vpu_malone.c @@ -68,6 +68,8 @@ #define STREAM_CONFIG_NUM_DBE_SET(x, y) CONFIG_SET(x, y, 30, 0x40000000) #define STREAM_CONFIG_FS_CTRL_MODE_SET(x, y) CONFIG_SET(x, y, 31, 0x80000000) +#define MALONE_DEC_FMT_RV_MASK BIT(21) + enum vpu_malone_stream_input_mode { INVALID_MODE = 0, FRAME_LVL, @@ -478,6 +480,9 @@ u32 vpu_malone_get_version(struct vpu_shared_addr *shared) { struct malone_iface *iface = shared->iface; + vpu_malone_enable_format(V4L2_PIX_FMT_RV30, iface->fw_version & MALONE_DEC_FMT_RV_MASK); + vpu_malone_enable_format(V4L2_PIX_FMT_RV40, iface->fw_version & MALONE_DEC_FMT_RV_MASK); + return iface->fw_version; } @@ -562,8 +567,23 @@ static struct malone_fmt_mapping fmt_mappings[] = { {V4L2_PIX_FMT_H263, MALONE_FMT_ASP}, {V4L2_PIX_FMT_JPEG, MALONE_FMT_JPG}, {V4L2_PIX_FMT_VP8, MALONE_FMT_VP8}, + {V4L2_PIX_FMT_SPK, MALONE_FMT_SPK}, + {V4L2_PIX_FMT_RV30, MALONE_FMT_RV}, + {V4L2_PIX_FMT_RV40, MALONE_FMT_RV}, }; +void vpu_malone_enable_format(u32 pixelformat, int enable) +{ + u32 i; + + for (i = 0; i < ARRAY_SIZE(fmt_mappings); i++) { + if (pixelformat == fmt_mappings[i].pixelformat) { + fmt_mappings[i].is_disabled = enable ? 0 : 1; + return; + } + } +} + static enum vpu_malone_format vpu_malone_format_remap(u32 pixelformat) { u32 i; @@ -641,7 +661,9 @@ static int vpu_malone_set_params(struct vpu_shared_addr *shared, hc->jpg[instance].jpg_mjpeg_interlaced = 0; } - hc->codec_param[instance].disp_imm = params->b_dis_reorder ? 1 : 0; + hc->codec_param[instance].disp_imm = params->display_delay_enable ? 1 : 0; + if (malone_format != MALONE_FMT_AVC) + hc->codec_param[instance].disp_imm = 0; hc->codec_param[instance].dbglog_enable = 0; iface->dbglog_desc.level = 0; @@ -987,6 +1009,9 @@ static const struct malone_padding_scode padding_scodes[] = { {SCODE_PADDING_EOS, V4L2_PIX_FMT_XVID, {0xb1010000, 0x0}}, {SCODE_PADDING_EOS, V4L2_PIX_FMT_H263, {0xb1010000, 0x0}}, {SCODE_PADDING_EOS, V4L2_PIX_FMT_VP8, {0x34010000, 0x0}}, + {SCODE_PADDING_EOS, V4L2_PIX_FMT_SPK, {0x34010000, 0x0}}, + {SCODE_PADDING_EOS, V4L2_PIX_FMT_RV30, {0x34010000, 0x0}}, + {SCODE_PADDING_EOS, V4L2_PIX_FMT_RV40, {0x34010000, 0x0}}, {SCODE_PADDING_EOS, V4L2_PIX_FMT_JPEG, {0xefff0000, 0x0}}, {SCODE_PADDING_ABORT, V4L2_PIX_FMT_H264, {0x0B010000, 0}}, {SCODE_PADDING_ABORT, V4L2_PIX_FMT_H264_MVC, {0x0B010000, 0}}, @@ -998,6 +1023,9 @@ static const struct malone_padding_scode padding_scodes[] = { {SCODE_PADDING_ABORT, V4L2_PIX_FMT_XVID, {0xb1010000, 0x0}}, {SCODE_PADDING_ABORT, V4L2_PIX_FMT_H263, {0xb1010000, 0x0}}, {SCODE_PADDING_ABORT, V4L2_PIX_FMT_VP8, {0x34010000, 0x0}}, + {SCODE_PADDING_ABORT, V4L2_PIX_FMT_SPK, {0x34010000, 0x0}}, + {SCODE_PADDING_ABORT, V4L2_PIX_FMT_RV30, {0x34010000, 0x0}}, + {SCODE_PADDING_ABORT, V4L2_PIX_FMT_RV40, {0x34010000, 0x0}}, {SCODE_PADDING_EOS, V4L2_PIX_FMT_JPEG, {0x0, 0x0}}, {SCODE_PADDING_BUFFLUSH, V4L2_PIX_FMT_H264, {0x15010000, 0x0}}, {SCODE_PADDING_BUFFLUSH, V4L2_PIX_FMT_H264_MVC, {0x15010000, 0x0}}, @@ -1411,6 +1439,16 @@ static int vpu_malone_insert_scode_vp8_pic(struct malone_scode_t *scode) return size; } +static int vpu_malone_insert_scode_spk_seq(struct malone_scode_t *scode) +{ + return vpu_malone_insert_scode_seq(scode, MALONE_CODEC_ID_SPK, 0); +} + +static int vpu_malone_insert_scode_spk_pic(struct malone_scode_t *scode) +{ + return vpu_malone_insert_scode_pic(scode, MALONE_CODEC_ID_SPK, 0); +} + static const struct malone_scode_handler scode_handlers[] = { { /* fix me, need to swap return operation after gstreamer swap */ @@ -1427,6 +1465,11 @@ static const struct malone_scode_handler scode_handlers[] = { .insert_scode_seq = vpu_malone_insert_scode_vp8_seq, .insert_scode_pic = vpu_malone_insert_scode_vp8_pic, }, + { + .pixelformat = V4L2_PIX_FMT_SPK, + .insert_scode_seq = vpu_malone_insert_scode_spk_seq, + .insert_scode_pic = vpu_malone_insert_scode_spk_pic, + }, }; static const struct malone_scode_handler *get_scode_handler(u32 pixelformat) |