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path: root/drivers/staging/vt6655
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-rw-r--r--drivers/staging/vt6655/baseband.c10
-rw-r--r--drivers/staging/vt6655/card.c103
-rw-r--r--drivers/staging/vt6655/channel.c2
-rw-r--r--drivers/staging/vt6655/device_main.c88
-rw-r--r--drivers/staging/vt6655/mac.c55
-rw-r--r--drivers/staging/vt6655/mac.h120
-rw-r--r--drivers/staging/vt6655/power.c25
-rw-r--r--drivers/staging/vt6655/rf.c20
-rw-r--r--drivers/staging/vt6655/rxtx.c6
-rw-r--r--drivers/staging/vt6655/srom.c2
-rw-r--r--drivers/staging/vt6655/upc.h35
11 files changed, 197 insertions, 269 deletions
diff --git a/drivers/staging/vt6655/baseband.c b/drivers/staging/vt6655/baseband.c
index 577a38fae369..5de841cb776c 100644
--- a/drivers/staging/vt6655/baseband.c
+++ b/drivers/staging/vt6655/baseband.c
@@ -1912,7 +1912,7 @@ bool bb_read_embedded(struct vnt_private *priv, unsigned char by_bb_addr,
iowrite8(by_bb_addr, iobase + MAC_REG_BBREGADR);
/* turn on REGR */
- MACvRegBitsOn(iobase, MAC_REG_BBREGCTL, BBREGCTL_REGR);
+ vt6655_mac_reg_bits_on(iobase, MAC_REG_BBREGCTL, BBREGCTL_REGR);
/* W_MAX_TIMEOUT is the timeout period */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
by_value = ioread8(iobase + MAC_REG_BBREGCTL);
@@ -1957,7 +1957,7 @@ bool bb_write_embedded(struct vnt_private *priv, unsigned char by_bb_addr,
iowrite8(by_data, iobase + MAC_REG_BBREGDATA);
/* turn on BBREGCTL_REGW */
- MACvRegBitsOn(iobase, MAC_REG_BBREGCTL, BBREGCTL_REGW);
+ vt6655_mac_reg_bits_on(iobase, MAC_REG_BBREGCTL, BBREGCTL_REGW);
/* W_MAX_TIMEOUT is the timeout period */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
by_value = ioread8(iobase + MAC_REG_BBREGCTL);
@@ -2013,8 +2013,8 @@ bool bb_vt3253_init(struct vnt_private *priv)
byVT3253B0_AGC4_RFMD2959[ii][0],
byVT3253B0_AGC4_RFMD2959[ii][1]);
- VNSvOutPortD(iobase + MAC_REG_ITRTMSET, 0x23);
- MACvRegBitsOn(iobase, MAC_REG_PAPEDELAY, BIT(0));
+ iowrite32(0x23, iobase + MAC_REG_ITRTMSET);
+ vt6655_mac_reg_bits_on(iobase, MAC_REG_PAPEDELAY, BIT(0));
}
priv->abyBBVGA[0] = 0x18;
priv->abyBBVGA[1] = 0x0A;
@@ -2054,7 +2054,7 @@ bool bb_vt3253_init(struct vnt_private *priv)
byVT3253B0_AGC[ii][1]);
iowrite8(0x23, iobase + MAC_REG_ITRTMSET);
- MACvRegBitsOn(iobase, MAC_REG_PAPEDELAY, BIT(0));
+ vt6655_mac_reg_bits_on(iobase, MAC_REG_PAPEDELAY, BIT(0));
priv->abyBBVGA[0] = 0x14;
priv->abyBBVGA[1] = 0x0A;
diff --git a/drivers/staging/vt6655/card.c b/drivers/staging/vt6655/card.c
index 2cde0082fc03..846469cc06bb 100644
--- a/drivers/staging/vt6655/card.c
+++ b/drivers/staging/vt6655/card.c
@@ -293,12 +293,10 @@ bool CARDbUpdateTSF(struct vnt_private *priv, unsigned char byRxRate,
qwTSFOffset = CARDqGetTSFOffset(byRxRate, qwBSSTimestamp,
local_tsf);
/* adjust TSF, HW's TSF add TSF Offset reg */
- VNSvOutPortD(priv->port_offset + MAC_REG_TSFOFST,
- (u32)qwTSFOffset);
- VNSvOutPortD(priv->port_offset + MAC_REG_TSFOFST + 4,
- (u32)(qwTSFOffset >> 32));
- MACvRegBitsOn(priv->port_offset, MAC_REG_TFTCTL,
- TFTCTL_TSFSYNCEN);
+ qwTSFOffset = le64_to_cpu(qwTSFOffset);
+ iowrite32((u32)qwTSFOffset, priv->port_offset + MAC_REG_TSFOFST);
+ iowrite32((u32)(qwTSFOffset >> 32), priv->port_offset + MAC_REG_TSFOFST + 4);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_TSFSYNCEN);
}
return true;
}
@@ -326,13 +324,13 @@ bool CARDbSetBeaconPeriod(struct vnt_private *priv,
qwNextTBTT = CARDqGetNextTBTT(qwNextTBTT, wBeaconInterval);
/* set HW beacon interval */
- VNSvOutPortW(priv->port_offset + MAC_REG_BI, wBeaconInterval);
+ iowrite16(wBeaconInterval, priv->port_offset + MAC_REG_BI);
priv->wBeaconInterval = wBeaconInterval;
/* Set NextTBTT */
- VNSvOutPortD(priv->port_offset + MAC_REG_NEXTTBTT, (u32)qwNextTBTT);
- VNSvOutPortD(priv->port_offset + MAC_REG_NEXTTBTT + 4,
- (u32)(qwNextTBTT >> 32));
- MACvRegBitsOn(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
+ qwNextTBTT = le64_to_cpu(qwNextTBTT);
+ iowrite32((u32)qwNextTBTT, priv->port_offset + MAC_REG_NEXTTBTT);
+ iowrite32((u32)(qwNextTBTT >> 32), priv->port_offset + MAC_REG_NEXTTBTT + 4);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
return true;
}
@@ -354,29 +352,28 @@ void CARDbRadioPowerOff(struct vnt_private *priv)
switch (priv->byRFType) {
case RF_RFMD2959:
- MACvWordRegBitsOff(priv->port_offset, MAC_REG_SOFTPWRCTL,
- SOFTPWRCTL_TXPEINV);
- MACvWordRegBitsOn(priv->port_offset, MAC_REG_SOFTPWRCTL,
- SOFTPWRCTL_SWPE1);
+ vt6655_mac_word_reg_bits_off(priv->port_offset, MAC_REG_SOFTPWRCTL,
+ SOFTPWRCTL_TXPEINV);
+ vt6655_mac_word_reg_bits_on(priv->port_offset, MAC_REG_SOFTPWRCTL,
+ SOFTPWRCTL_SWPE1);
break;
case RF_AIROHA:
case RF_AL2230S:
- MACvWordRegBitsOff(priv->port_offset, MAC_REG_SOFTPWRCTL,
- SOFTPWRCTL_SWPE2);
- MACvWordRegBitsOff(priv->port_offset, MAC_REG_SOFTPWRCTL,
- SOFTPWRCTL_SWPE3);
+ vt6655_mac_word_reg_bits_off(priv->port_offset, MAC_REG_SOFTPWRCTL,
+ SOFTPWRCTL_SWPE2);
+ vt6655_mac_word_reg_bits_off(priv->port_offset, MAC_REG_SOFTPWRCTL,
+ SOFTPWRCTL_SWPE3);
break;
}
- MACvRegBitsOff(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_RXON);
+ vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_RXON);
bb_set_deep_sleep(priv, priv->local_id);
priv->radio_off = true;
pr_debug("chester power off\n");
- MACvRegBitsOn(priv->port_offset, MAC_REG_GPIOCTL0,
- LED_ACTSET); /* LED issue */
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_GPIOCTL0, LED_ACTSET); /* LED issue */
}
void CARDvSafeResetTx(struct vnt_private *priv)
@@ -411,8 +408,7 @@ void CARDvSafeResetTx(struct vnt_private *priv)
MACvSetCurrTXDescAddr(TYPE_AC0DMA, priv, priv->td1_pool_dma);
/* set MAC Beacon TX pointer */
- MACvSetCurrBCNTxDescAddr(priv->port_offset,
- (priv->tx_beacon_dma));
+ iowrite32((u32)priv->tx_beacon_dma, priv->port_offset + MAC_REG_BCNDMAPTR);
}
/*
@@ -453,8 +449,8 @@ void CARDvSafeResetRx(struct vnt_private *priv)
}
/* set perPkt mode */
- MACvRx0PerPktMode(priv->port_offset);
- MACvRx1PerPktMode(priv->port_offset);
+ iowrite32(RX_PERPKT, priv->port_offset + MAC_REG_RXDMACTL0);
+ iowrite32(RX_PERPKT, priv->port_offset + MAC_REG_RXDMACTL1);
/* set MAC RD pointer */
MACvSetCurrRx0DescAddr(priv, priv->rd0_pool_dma);
@@ -553,7 +549,7 @@ void CARDvSetRSPINF(struct vnt_private *priv, u8 bb_type)
/* swap over to get correct write order */
swap(phy.swap[0], phy.swap[1]);
- VNSvOutPortD(priv->port_offset + MAC_REG_RSPINF_B_1, phy.field_write);
+ iowrite32(phy.field_write, priv->port_offset + MAC_REG_RSPINF_B_1);
/* RSPINF_b_2 */
vnt_get_phy_field(priv, 14,
@@ -562,7 +558,7 @@ void CARDvSetRSPINF(struct vnt_private *priv, u8 bb_type)
swap(phy.swap[0], phy.swap[1]);
- VNSvOutPortD(priv->port_offset + MAC_REG_RSPINF_B_2, phy.field_write);
+ iowrite32(phy.field_write, priv->port_offset + MAC_REG_RSPINF_B_2);
/* RSPINF_b_5 */
vnt_get_phy_field(priv, 14,
@@ -571,7 +567,7 @@ void CARDvSetRSPINF(struct vnt_private *priv, u8 bb_type)
swap(phy.swap[0], phy.swap[1]);
- VNSvOutPortD(priv->port_offset + MAC_REG_RSPINF_B_5, phy.field_write);
+ iowrite32(phy.field_write, priv->port_offset + MAC_REG_RSPINF_B_5);
/* RSPINF_b_11 */
vnt_get_phy_field(priv, 14,
@@ -580,75 +576,66 @@ void CARDvSetRSPINF(struct vnt_private *priv, u8 bb_type)
swap(phy.swap[0], phy.swap[1]);
- VNSvOutPortD(priv->port_offset + MAC_REG_RSPINF_B_11, phy.field_write);
+ iowrite32(phy.field_write, priv->port_offset + MAC_REG_RSPINF_B_11);
/* RSPINF_a_6 */
s_vCalculateOFDMRParameter(RATE_6M,
bb_type,
&byTxRate,
&byRsvTime);
- VNSvOutPortW(priv->port_offset + MAC_REG_RSPINF_A_6,
- MAKEWORD(byTxRate, byRsvTime));
+ iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_6);
/* RSPINF_a_9 */
s_vCalculateOFDMRParameter(RATE_9M,
bb_type,
&byTxRate,
&byRsvTime);
- VNSvOutPortW(priv->port_offset + MAC_REG_RSPINF_A_9,
- MAKEWORD(byTxRate, byRsvTime));
+ iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_9);
/* RSPINF_a_12 */
s_vCalculateOFDMRParameter(RATE_12M,
bb_type,
&byTxRate,
&byRsvTime);
- VNSvOutPortW(priv->port_offset + MAC_REG_RSPINF_A_12,
- MAKEWORD(byTxRate, byRsvTime));
+ iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_12);
/* RSPINF_a_18 */
s_vCalculateOFDMRParameter(RATE_18M,
bb_type,
&byTxRate,
&byRsvTime);
- VNSvOutPortW(priv->port_offset + MAC_REG_RSPINF_A_18,
- MAKEWORD(byTxRate, byRsvTime));
+ iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_18);
/* RSPINF_a_24 */
s_vCalculateOFDMRParameter(RATE_24M,
bb_type,
&byTxRate,
&byRsvTime);
- VNSvOutPortW(priv->port_offset + MAC_REG_RSPINF_A_24,
- MAKEWORD(byTxRate, byRsvTime));
+ iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_24);
/* RSPINF_a_36 */
s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv,
RATE_36M),
bb_type,
&byTxRate,
&byRsvTime);
- VNSvOutPortW(priv->port_offset + MAC_REG_RSPINF_A_36,
- MAKEWORD(byTxRate, byRsvTime));
+ iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_36);
/* RSPINF_a_48 */
s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv,
RATE_48M),
bb_type,
&byTxRate,
&byRsvTime);
- VNSvOutPortW(priv->port_offset + MAC_REG_RSPINF_A_48,
- MAKEWORD(byTxRate, byRsvTime));
+ iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_48);
/* RSPINF_a_54 */
s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv,
RATE_54M),
bb_type,
&byTxRate,
&byRsvTime);
- VNSvOutPortW(priv->port_offset + MAC_REG_RSPINF_A_54,
- MAKEWORD(byTxRate, byRsvTime));
+ iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_54);
/* RSPINF_a_72 */
s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv,
RATE_54M),
bb_type,
&byTxRate,
&byRsvTime);
- VNSvOutPortW(priv->port_offset + MAC_REG_RSPINF_A_72,
- MAKEWORD(byTxRate, byRsvTime));
+ iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_72);
/* Set to Page0 */
MACvSelectPage0(priv->port_offset);
@@ -734,9 +721,9 @@ u64 CARDqGetTSFOffset(unsigned char byRxRate, u64 qwTSF1, u64 qwTSF2)
* In:
* priv - The adapter to be read
* Out:
- * qwCurrTSF - Current TSF counter
+ * none
*
- * Return Value: true if success; otherwise false
+ * Return Value: Current TSF counter
*/
u64 vt6655_get_current_tsf(struct vnt_private *priv)
{
@@ -745,7 +732,7 @@ u64 vt6655_get_current_tsf(struct vnt_private *priv)
unsigned char data;
u32 low, high;
- MACvRegBitsOn(iobase, MAC_REG_TFTCTL, TFTCTL_TSFCNTRRD);
+ vt6655_mac_reg_bits_on(iobase, MAC_REG_TFTCTL, TFTCTL_TSFCNTRRD);
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
data = ioread8(iobase + MAC_REG_TFTCTL);
if (!(data & TFTCTL_TSFCNTRRD))
@@ -808,9 +795,10 @@ void CARDvSetFirstNextTBTT(struct vnt_private *priv,
qwNextTBTT = CARDqGetNextTBTT(qwNextTBTT, wBeaconInterval);
/* Set NextTBTT */
- VNSvOutPortD(iobase + MAC_REG_NEXTTBTT, (u32)qwNextTBTT);
- VNSvOutPortD(iobase + MAC_REG_NEXTTBTT + 4, (u32)(qwNextTBTT >> 32));
- MACvRegBitsOn(iobase, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
+ qwNextTBTT = le64_to_cpu(qwNextTBTT);
+ iowrite32((u32)qwNextTBTT, iobase + MAC_REG_NEXTTBTT);
+ iowrite32((u32)(qwNextTBTT >> 32), iobase + MAC_REG_NEXTTBTT + 4);
+ vt6655_mac_reg_bits_on(iobase, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
}
/*
@@ -834,8 +822,9 @@ void CARDvUpdateNextTBTT(struct vnt_private *priv, u64 qwTSF,
qwTSF = CARDqGetNextTBTT(qwTSF, wBeaconInterval);
/* Set NextTBTT */
- VNSvOutPortD(iobase + MAC_REG_NEXTTBTT, (u32)qwTSF);
- VNSvOutPortD(iobase + MAC_REG_NEXTTBTT + 4, (u32)(qwTSF >> 32));
- MACvRegBitsOn(iobase, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
+ qwTSF = le64_to_cpu(qwTSF);
+ iowrite32((u32)qwTSF, iobase + MAC_REG_NEXTTBTT);
+ iowrite32((u32)(qwTSF >> 32), iobase + MAC_REG_NEXTTBTT + 4);
+ vt6655_mac_reg_bits_on(iobase, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
pr_debug("Card:Update Next TBTT[%8llx]\n", qwTSF);
}
diff --git a/drivers/staging/vt6655/channel.c b/drivers/staging/vt6655/channel.c
index 652dcaf61169..e926f9829a15 100644
--- a/drivers/staging/vt6655/channel.c
+++ b/drivers/staging/vt6655/channel.c
@@ -94,7 +94,7 @@ bool set_channel(struct vnt_private *priv, struct ieee80211_channel *ch)
}
/* clear NAV */
- MACvRegBitsOn(priv->port_offset, MAC_REG_MACCR, MACCR_CLRNAV);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_MACCR, MACCR_CLRNAV);
/* TX_PE will reserve 3 us for MAX2829 A mode only,
* it is for better TX throughput
diff --git a/drivers/staging/vt6655/device_main.c b/drivers/staging/vt6655/device_main.c
index e8ac7b93b58c..bab08a40fe66 100644
--- a/drivers/staging/vt6655/device_main.c
+++ b/drivers/staging/vt6655/device_main.c
@@ -122,6 +122,9 @@ static int vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent);
static void device_free_info(struct vnt_private *priv);
static void device_print_info(struct vnt_private *priv);
+static void vt6655_mac_write_bssid_addr(void __iomem *iobase, const u8 *mac_addr);
+static void vt6655_mac_read_ether_addr(void __iomem *iobase, u8 *mac_addr);
+
static int device_init_rd0_ring(struct vnt_private *priv);
static int device_init_rd1_ring(struct vnt_private *priv);
static int device_init_td0_ring(struct vnt_private *priv);
@@ -186,6 +189,22 @@ device_set_options(struct vnt_private *priv)
pr_debug(" byBBType= %d\n", (int)priv->byBBType);
}
+static void vt6655_mac_write_bssid_addr(void __iomem *iobase, const u8 *mac_addr)
+{
+ iowrite8(1, iobase + MAC_REG_PAGE1SEL);
+ for (int i = 0; i < 6; i++)
+ iowrite8(mac_addr[i], iobase + MAC_REG_BSSID0 + i);
+ iowrite8(0, iobase + MAC_REG_PAGE1SEL);
+}
+
+static void vt6655_mac_read_ether_addr(void __iomem *iobase, u8 *mac_addr)
+{
+ iowrite8(1, iobase + MAC_REG_PAGE1SEL);
+ for (int i = 0; i < 6; i++)
+ mac_addr[i] = ioread8(iobase + MAC_REG_PAR0 + i);
+ iowrite8(0, iobase + MAC_REG_PAGE1SEL);
+}
+
/*
* Initialisation of MAC & BBP registers
*/
@@ -340,8 +359,8 @@ static void device_init_registers(struct vnt_private *priv)
}
/* use relative tx timeout and 802.11i D4 */
- MACvWordRegBitsOn(priv->port_offset,
- MAC_REG_CFG, (CFG_TKIPOPT | CFG_NOTXTIMEOUT));
+ vt6655_mac_word_reg_bits_on(priv->port_offset, MAC_REG_CFG,
+ (CFG_TKIPOPT | CFG_NOTXTIMEOUT));
/* set performance parameter by registry */
MACvSetShortRetryLimit(priv, priv->byShortRetryLimit);
@@ -398,7 +417,7 @@ static void device_init_registers(struct vnt_private *priv)
CARDvSafeResetTx(priv);
if (priv->local_id <= REV_ID_VT3253_A1)
- MACvRegBitsOn(priv->port_offset, MAC_REG_RCR, RCR_WPAERR);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_RCR, RCR_WPAERR);
/* Turn On Rx DMA */
MACvReceive0(priv->port_offset);
@@ -1055,13 +1074,12 @@ static void vnt_interrupt_process(struct vnt_private *priv)
* update ISR counter
*/
while (isr && priv->vif) {
- MACvWriteISR(priv->port_offset, isr);
+ iowrite32(isr, priv->port_offset + MAC_REG_ISR);
if (isr & ISR_FETALERR) {
pr_debug(" ISR_FETALERR\n");
iowrite8(0, priv->port_offset + MAC_REG_SOFTPWRCTL);
- VNSvOutPortW(priv->port_offset +
- MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPECTI);
+ iowrite16(SOFTPWRCTL_SWPECTI, priv->port_offset + MAC_REG_SOFTPWRCTL);
device_error(priv, isr);
}
@@ -1135,7 +1153,7 @@ static void vnt_interrupt_work(struct work_struct *work)
if (priv->vif)
vnt_interrupt_process(priv);
- MACvIntEnable(priv->port_offset, IMR_MASK_VALUE);
+ iowrite32(IMR_MASK_VALUE, priv->port_offset + MAC_REG_IMR);
}
static irqreturn_t vnt_interrupt(int irq, void *arg)
@@ -1144,7 +1162,7 @@ static irqreturn_t vnt_interrupt(int irq, void *arg)
schedule_work(&priv->interrupt_work);
- MACvIntDisable(priv->port_offset);
+ iowrite32(0, priv->port_offset + MAC_REG_IMR);
return IRQ_HANDLED;
}
@@ -1253,8 +1271,8 @@ static int vnt_start(struct ieee80211_hw *hw)
device_init_registers(priv);
- dev_dbg(&priv->pcid->dev, "call MACvIntEnable\n");
- MACvIntEnable(priv->port_offset, IMR_MASK_VALUE);
+ dev_dbg(&priv->pcid->dev, "enable MAC interrupt\n");
+ iowrite32(IMR_MASK_VALUE, priv->port_offset + MAC_REG_IMR);
ieee80211_wake_queues(hw);
@@ -1304,15 +1322,15 @@ static int vnt_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
case NL80211_IFTYPE_STATION:
break;
case NL80211_IFTYPE_ADHOC:
- MACvRegBitsOff(priv->port_offset, MAC_REG_RCR, RCR_UNICAST);
+ vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_RCR, RCR_UNICAST);
- MACvRegBitsOn(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
break;
case NL80211_IFTYPE_AP:
- MACvRegBitsOff(priv->port_offset, MAC_REG_RCR, RCR_UNICAST);
+ vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_RCR, RCR_UNICAST);
- MACvRegBitsOn(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_AP);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_AP);
break;
default:
@@ -1333,16 +1351,16 @@ static void vnt_remove_interface(struct ieee80211_hw *hw,
case NL80211_IFTYPE_STATION:
break;
case NL80211_IFTYPE_ADHOC:
- MACvRegBitsOff(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX);
- MACvRegBitsOff(priv->port_offset,
- MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
- MACvRegBitsOff(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
+ vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX);
+ vt6655_mac_reg_bits_off(priv->port_offset,
+ MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
+ vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
break;
case NL80211_IFTYPE_AP:
- MACvRegBitsOff(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX);
- MACvRegBitsOff(priv->port_offset,
- MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
- MACvRegBitsOff(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_AP);
+ vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX);
+ vt6655_mac_reg_bits_off(priv->port_offset,
+ MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
+ vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_AP);
break;
default:
break;
@@ -1406,7 +1424,7 @@ static void vnt_bss_info_changed(struct ieee80211_hw *hw,
spin_lock_irqsave(&priv->lock, flags);
- MACvWriteBSSIDAddress(priv->port_offset, conf->bssid);
+ vt6655_mac_write_bssid_addr(priv->port_offset, conf->bssid);
spin_unlock_irqrestore(&priv->lock, flags);
}
@@ -1458,11 +1476,10 @@ static void vnt_bss_info_changed(struct ieee80211_hw *hw,
if (conf->enable_beacon) {
vnt_beacon_enable(priv, vif, conf);
- MACvRegBitsOn(priv->port_offset, MAC_REG_TCR,
- TCR_AUTOBCNTX);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX);
} else {
- MACvRegBitsOff(priv->port_offset, MAC_REG_TCR,
- TCR_AUTOBCNTX);
+ vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_TCR,
+ TCR_AUTOBCNTX);
}
}
@@ -1523,20 +1540,17 @@ static void vnt_configure(struct ieee80211_hw *hw,
if (priv->mc_list_count > 2) {
MACvSelectPage1(priv->port_offset);
- VNSvOutPortD(priv->port_offset +
- MAC_REG_MAR0, 0xffffffff);
- VNSvOutPortD(priv->port_offset +
- MAC_REG_MAR0 + 4, 0xffffffff);
+ iowrite32(0xffffffff, priv->port_offset + MAC_REG_MAR0);
+ iowrite32(0xffffffff, priv->port_offset + MAC_REG_MAR0 + 4);
MACvSelectPage0(priv->port_offset);
} else {
MACvSelectPage1(priv->port_offset);
- VNSvOutPortD(priv->port_offset +
- MAC_REG_MAR0, (u32)multicast);
- VNSvOutPortD(priv->port_offset +
- MAC_REG_MAR0 + 4,
- (u32)(multicast >> 32));
+ multicast = le64_to_cpu(multicast);
+ iowrite32((u32)multicast, priv->port_offset + MAC_REG_MAR0);
+ iowrite32((u32)(multicast >> 32),
+ priv->port_offset + MAC_REG_MAR0 + 4);
MACvSelectPage0(priv->port_offset);
}
@@ -1726,7 +1740,7 @@ vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent)
}
/* initial to reload eeprom */
MACvInitialize(priv);
- MACvReadEtherAddress(priv->port_offset, priv->abyCurrentNetAddr);
+ vt6655_mac_read_ether_addr(priv->port_offset, priv->abyCurrentNetAddr);
/* Get RFType */
priv->byRFType = SROMbyReadEmbedded(priv->port_offset, EEP_OFS_RFTYPE);
diff --git a/drivers/staging/vt6655/mac.c b/drivers/staging/vt6655/mac.c
index 88ddd0676463..dcc649532737 100644
--- a/drivers/staging/vt6655/mac.c
+++ b/drivers/staging/vt6655/mac.c
@@ -38,6 +38,47 @@
#include "mac.h"
+void vt6655_mac_reg_bits_on(void __iomem *iobase, const u8 reg_offset, const u8 bit_mask)
+{
+ unsigned char reg_value;
+
+ reg_value = ioread8(iobase + reg_offset);
+ iowrite8(reg_value | bit_mask, iobase + reg_offset);
+}
+
+void vt6655_mac_word_reg_bits_on(void __iomem *iobase, const u8 reg_offset, const u16 bit_mask)
+{
+ unsigned short reg_value;
+
+ reg_value = ioread16(iobase + reg_offset);
+ iowrite16(reg_value | (bit_mask), iobase + reg_offset);
+}
+
+void vt6655_mac_reg_bits_off(void __iomem *iobase, const u8 reg_offset, const u8 bit_mask)
+{
+ unsigned char reg_value;
+
+ reg_value = ioread8(iobase + reg_offset);
+ iowrite8(reg_value & ~(bit_mask), iobase + reg_offset);
+}
+
+void vt6655_mac_word_reg_bits_off(void __iomem *iobase, const u8 reg_offset, const u16 bit_mask)
+{
+ unsigned short reg_value;
+
+ reg_value = ioread16(iobase + reg_offset);
+ iowrite16(reg_value & ~(bit_mask), iobase + reg_offset);
+}
+
+static void vt6655_mac_clear_stck_ds(void __iomem *iobase)
+{
+ u8 reg_value;
+
+ reg_value = ioread8(iobase + MAC_REG_STICKHW);
+ reg_value = reg_value & 0xFC;
+ iowrite8(reg_value, iobase + MAC_REG_STICKHW);
+}
+
/*
* Description:
* Test if all test bits off
@@ -337,7 +378,7 @@ bool MACbSafeRxOff(struct vnt_private *priv)
}
/* try to safe shutdown RX */
- MACvRegBitsOff(io_base, MAC_REG_HOSTCR, HOSTCR_RXON);
+ vt6655_mac_reg_bits_off(io_base, MAC_REG_HOSTCR, HOSTCR_RXON);
/* W_MAX_TIMEOUT is the timeout period */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
if (!(ioread8(io_base + MAC_REG_HOSTCR) & HOSTCR_RXONST))
@@ -392,7 +433,7 @@ bool MACbSafeTxOff(struct vnt_private *priv)
}
/* try to safe shutdown TX */
- MACvRegBitsOff(io_base, MAC_REG_HOSTCR, HOSTCR_TXON);
+ vt6655_mac_reg_bits_off(io_base, MAC_REG_HOSTCR, HOSTCR_TXON);
/* W_MAX_TIMEOUT is the timeout period */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
@@ -423,7 +464,7 @@ bool MACbSafeStop(struct vnt_private *priv)
{
void __iomem *io_base = priv->port_offset;
- MACvRegBitsOff(io_base, MAC_REG_TCR, TCR_AUTOBCNTX);
+ vt6655_mac_reg_bits_off(io_base, MAC_REG_TCR, TCR_AUTOBCNTX);
if (!MACbSafeRxOff(priv)) {
pr_debug(" MACbSafeRxOff == false)\n");
@@ -436,7 +477,7 @@ bool MACbSafeStop(struct vnt_private *priv)
return false;
}
- MACvRegBitsOff(io_base, MAC_REG_HOSTCR, HOSTCR_MACEN);
+ vt6655_mac_reg_bits_off(io_base, MAC_REG_HOSTCR, HOSTCR_MACEN);
return true;
}
@@ -458,7 +499,7 @@ bool MACbShutdown(struct vnt_private *priv)
{
void __iomem *io_base = priv->port_offset;
/* disable MAC IMR */
- MACvIntDisable(io_base);
+ iowrite32(0, io_base + MAC_REG_IMR);
MACvSetLoopbackMode(priv, MAC_LB_INTERNAL);
/* stop the adapter */
if (!MACbSafeStop(priv)) {
@@ -486,7 +527,7 @@ void MACvInitialize(struct vnt_private *priv)
{
void __iomem *io_base = priv->port_offset;
/* clear sticky bits */
- MACvClearStckDS(io_base);
+ vt6655_mac_clear_stck_ds(io_base);
/* disable force PME-enable */
iowrite8(PME_OVR, io_base + MAC_REG_PMC1);
/* only 3253 A */
@@ -730,7 +771,7 @@ bool MACbPSWakeup(struct vnt_private *priv)
return true;
/* Disable PS */
- MACvRegBitsOff(io_base, MAC_REG_PSCTL, PSCTL_PSEN);
+ vt6655_mac_reg_bits_off(io_base, MAC_REG_PSCTL, PSCTL_PSEN);
/* Check if SyncFlushOK */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
diff --git a/drivers/staging/vt6655/mac.h b/drivers/staging/vt6655/mac.h
index 57ae3bdbdb2d..0122c4603c66 100644
--- a/drivers/staging/vt6655/mac.h
+++ b/drivers/staging/vt6655/mac.h
@@ -18,7 +18,7 @@
#ifndef __MAC_H__
#define __MAC_H__
-#include "upc.h"
+#include "device.h"
/*--------------------- Export Definitions -------------------------*/
/* Registers in the MAC */
@@ -537,82 +537,14 @@
/*--------------------- Export Macros ------------------------------*/
-#define MACvRegBitsOn(iobase, byRegOfs, byBits) \
-do { \
- unsigned char byData; \
- byData = ioread8(iobase + byRegOfs); \
- iowrite8(byData | (byBits), iobase + byRegOfs); \
-} while (0)
-
-#define MACvWordRegBitsOn(iobase, byRegOfs, wBits) \
-do { \
- unsigned short wData; \
- wData = ioread16(iobase + byRegOfs); \
- VNSvOutPortW(iobase + byRegOfs, wData | (wBits)); \
-} while (0)
-
-#define MACvRegBitsOff(iobase, byRegOfs, byBits) \
-do { \
- unsigned char byData; \
- byData = ioread8(iobase + byRegOfs); \
- iowrite8(byData & ~(byBits), iobase + byRegOfs); \
-} while (0)
-
-#define MACvWordRegBitsOff(iobase, byRegOfs, wBits) \
-do { \
- unsigned short wData; \
- wData = ioread16(iobase + byRegOfs); \
- VNSvOutPortW(iobase + byRegOfs, wData & ~(wBits)); \
-} while (0)
-
-/* set the chip with current BCN tx descriptor address */
-#define MACvSetCurrBCNTxDescAddr(iobase, dwCurrDescAddr) \
- VNSvOutPortD(iobase + MAC_REG_BCNDMAPTR, \
- dwCurrDescAddr)
-
-/* set the chip with current BCN length */
-#define MACvSetCurrBCNLength(iobase, wCurrBCNLength) \
- VNSvOutPortW(iobase + MAC_REG_BCNDMACTL + 2, \
- wCurrBCNLength)
-
-#define MACvWriteBSSIDAddress(iobase, pbyEtherAddr) \
-do { \
- iowrite8(1, iobase + MAC_REG_PAGE1SEL); \
- iowrite8(pbyEtherAddr[0], iobase + MAC_REG_BSSID0); \
- iowrite8(pbyEtherAddr[1], iobase + MAC_REG_BSSID0 + 1); \
- iowrite8(pbyEtherAddr[2], iobase + MAC_REG_BSSID0 + 2); \
- iowrite8(pbyEtherAddr[3], iobase + MAC_REG_BSSID0 + 3); \
- iowrite8(pbyEtherAddr[4], iobase + MAC_REG_BSSID0 + 4); \
- iowrite8(pbyEtherAddr[5], iobase + MAC_REG_BSSID0 + 5); \
- iowrite8(0, iobase + MAC_REG_PAGE1SEL); \
-} while (0)
-
-#define MACvReadEtherAddress(iobase, pbyEtherAddr) \
-do { \
- iowrite8(1, iobase + MAC_REG_PAGE1SEL); \
- pbyEtherAddr[0] = ioread8(iobase + MAC_REG_PAR0); \
- pbyEtherAddr[1] = ioread8(iobase + MAC_REG_PAR0 + 1); \
- pbyEtherAddr[2] = ioread8(iobase + MAC_REG_PAR0 + 2); \
- pbyEtherAddr[3] = ioread8(iobase + MAC_REG_PAR0 + 3); \
- pbyEtherAddr[4] = ioread8(iobase + MAC_REG_PAR0 + 4); \
- pbyEtherAddr[5] = ioread8(iobase + MAC_REG_PAR0 + 5); \
- iowrite8(0, iobase + MAC_REG_PAGE1SEL); \
-} while (0)
-
-#define MACvRx0PerPktMode(iobase) \
- VNSvOutPortD(iobase + MAC_REG_RXDMACTL0, RX_PERPKT)
-
-#define MACvRx1PerPktMode(iobase) \
- VNSvOutPortD(iobase + MAC_REG_RXDMACTL1, RX_PERPKT)
-
#define MACvReceive0(iobase) \
do { \
unsigned long dwData; \
dwData = ioread32(iobase + MAC_REG_RXDMACTL0); \
if (dwData & DMACTL_RUN) \
- VNSvOutPortD(iobase + MAC_REG_RXDMACTL0, DMACTL_WAKE); \
+ iowrite32(DMACTL_WAKE, iobase + MAC_REG_RXDMACTL0); \
else \
- VNSvOutPortD(iobase + MAC_REG_RXDMACTL0, DMACTL_RUN); \
+ iowrite32(DMACTL_RUN, iobase + MAC_REG_RXDMACTL0); \
} while (0)
#define MACvReceive1(iobase) \
@@ -620,9 +552,9 @@ do { \
unsigned long dwData; \
dwData = ioread32(iobase + MAC_REG_RXDMACTL1); \
if (dwData & DMACTL_RUN) \
- VNSvOutPortD(iobase + MAC_REG_RXDMACTL1, DMACTL_WAKE); \
+ iowrite32(DMACTL_WAKE, iobase + MAC_REG_RXDMACTL1); \
else \
- VNSvOutPortD(iobase + MAC_REG_RXDMACTL1, DMACTL_RUN); \
+ iowrite32(DMACTL_RUN, iobase + MAC_REG_RXDMACTL1); \
} while (0)
#define MACvTransmit0(iobase) \
@@ -630,9 +562,9 @@ do { \
unsigned long dwData; \
dwData = ioread32(iobase + MAC_REG_TXDMACTL0); \
if (dwData & DMACTL_RUN) \
- VNSvOutPortD(iobase + MAC_REG_TXDMACTL0, DMACTL_WAKE); \
+ iowrite32(DMACTL_WAKE, iobase + MAC_REG_TXDMACTL0); \
else \
- VNSvOutPortD(iobase + MAC_REG_TXDMACTL0, DMACTL_RUN); \
+ iowrite32(DMACTL_RUN, iobase + MAC_REG_TXDMACTL0); \
} while (0)
#define MACvTransmitAC0(iobase) \
@@ -640,28 +572,11 @@ do { \
unsigned long dwData; \
dwData = ioread32(iobase + MAC_REG_AC0DMACTL); \
if (dwData & DMACTL_RUN) \
- VNSvOutPortD(iobase + MAC_REG_AC0DMACTL, DMACTL_WAKE); \
+ iowrite32(DMACTL_WAKE, iobase + MAC_REG_AC0DMACTL); \
else \
- VNSvOutPortD(iobase + MAC_REG_AC0DMACTL, DMACTL_RUN); \
-} while (0)
-
-#define MACvClearStckDS(iobase) \
-do { \
- unsigned char byOrgValue; \
- byOrgValue = ioread8(iobase + MAC_REG_STICKHW); \
- byOrgValue = byOrgValue & 0xFC; \
- iowrite8(byOrgValue, iobase + MAC_REG_STICKHW); \
+ iowrite32(DMACTL_RUN, iobase + MAC_REG_AC0DMACTL); \
} while (0)
-#define MACvWriteISR(iobase, dwValue) \
- VNSvOutPortD(iobase + MAC_REG_ISR, dwValue)
-
-#define MACvIntEnable(iobase, dwMask) \
- VNSvOutPortD(iobase + MAC_REG_IMR, dwMask)
-
-#define MACvIntDisable(iobase) \
- VNSvOutPortD(iobase + MAC_REG_IMR, 0)
-
#define MACvSelectPage0(iobase) \
iowrite8(0, iobase + MAC_REG_PAGE1SEL)
@@ -673,7 +588,7 @@ do { \
unsigned long dwOrgValue; \
dwOrgValue = ioread32(iobase + MAC_REG_ENCFG); \
dwOrgValue = dwOrgValue | ENCFG_PROTECTMD; \
- VNSvOutPortD(iobase + MAC_REG_ENCFG, dwOrgValue); \
+ iowrite32((u32)dwOrgValue, iobase + MAC_REG_ENCFG); \
} while (0)
#define MACvDisableProtectMD(iobase) \
@@ -681,7 +596,7 @@ do { \
unsigned long dwOrgValue; \
dwOrgValue = ioread32(iobase + MAC_REG_ENCFG); \
dwOrgValue = dwOrgValue & ~ENCFG_PROTECTMD; \
- VNSvOutPortD(iobase + MAC_REG_ENCFG, dwOrgValue); \
+ iowrite32((u32)dwOrgValue, iobase + MAC_REG_ENCFG); \
} while (0)
#define MACvEnableBarkerPreambleMd(iobase) \
@@ -689,7 +604,7 @@ do { \
unsigned long dwOrgValue; \
dwOrgValue = ioread32(iobase + MAC_REG_ENCFG); \
dwOrgValue = dwOrgValue | ENCFG_BARKERPREAM; \
- VNSvOutPortD(iobase + MAC_REG_ENCFG, dwOrgValue); \
+ iowrite32((u32)dwOrgValue, iobase + MAC_REG_ENCFG); \
} while (0)
#define MACvDisableBarkerPreambleMd(iobase) \
@@ -697,7 +612,7 @@ do { \
unsigned long dwOrgValue; \
dwOrgValue = ioread32(iobase + MAC_REG_ENCFG); \
dwOrgValue = dwOrgValue & ~ENCFG_BARKERPREAM; \
- VNSvOutPortD(iobase + MAC_REG_ENCFG, dwOrgValue); \
+ iowrite32((u32)dwOrgValue, iobase + MAC_REG_ENCFG); \
} while (0)
#define MACvSetBBType(iobase, byTyp) \
@@ -706,15 +621,20 @@ do { \
dwOrgValue = ioread32(iobase + MAC_REG_ENCFG); \
dwOrgValue = dwOrgValue & ~ENCFG_BBTYPE_MASK; \
dwOrgValue = dwOrgValue | (unsigned long)byTyp; \
- VNSvOutPortD(iobase + MAC_REG_ENCFG, dwOrgValue); \
+ iowrite32((u32)dwOrgValue, iobase + MAC_REG_ENCFG); \
} while (0)
#define MACvSetRFLE_LatchBase(iobase) \
- MACvWordRegBitsOn(iobase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_RFLEOPT)
+ vt6655_mac_word_reg_bits_on(iobase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_RFLEOPT)
#define MAKEWORD(lb, hb) \
((unsigned short)(((unsigned char)(lb)) | (((unsigned short)((unsigned char)(hb))) << 8)))
+void vt6655_mac_reg_bits_on(void __iomem *iobase, const u8 reg_offset, const u8 bit_mask);
+void vt6655_mac_word_reg_bits_on(void __iomem *iobase, const u8 reg_offset, const u16 bit_mask);
+void vt6655_mac_reg_bits_off(void __iomem *iobase, const u8 reg_offset, const u8 bit_mask);
+void vt6655_mac_word_reg_bits_off(void __iomem *iobase, const u8 reg_offset, const u16 bit_mask);
+
bool MACbIsRegBitsOff(struct vnt_private *priv, unsigned char byRegOfs,
unsigned char byTestBits);
diff --git a/drivers/staging/vt6655/power.c b/drivers/staging/vt6655/power.c
index 06066fa56dd5..8527ad3eff48 100644
--- a/drivers/staging/vt6655/power.c
+++ b/drivers/staging/vt6655/power.c
@@ -52,30 +52,30 @@ void PSvEnablePowerSaving(struct vnt_private *priv,
u16 wAID = priv->current_aid | BIT(14) | BIT(15);
/* set period of power up before TBTT */
- VNSvOutPortW(priv->port_offset + MAC_REG_PWBT, C_PWBT);
+ iowrite16(C_PWBT, priv->port_offset + MAC_REG_PWBT);
if (priv->op_mode != NL80211_IFTYPE_ADHOC) {
/* set AID */
- VNSvOutPortW(priv->port_offset + MAC_REG_AIDATIM, wAID);
+ iowrite16(wAID, priv->port_offset + MAC_REG_AIDATIM);
}
/* Set AutoSleep */
- MACvRegBitsOn(priv->port_offset, MAC_REG_PSCFG, PSCFG_AUTOSLEEP);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_PSCFG, PSCFG_AUTOSLEEP);
/* Set HWUTSF */
- MACvRegBitsOn(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_HWUTSF);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_HWUTSF);
if (wListenInterval >= 2) {
/* clear always listen beacon */
- MACvRegBitsOff(priv->port_offset, MAC_REG_PSCTL, PSCTL_ALBCN);
+ vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_PSCTL, PSCTL_ALBCN);
/* first time set listen next beacon */
- MACvRegBitsOn(priv->port_offset, MAC_REG_PSCTL, PSCTL_LNBCN);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_PSCTL, PSCTL_LNBCN);
} else {
/* always listen beacon */
- MACvRegBitsOn(priv->port_offset, MAC_REG_PSCTL, PSCTL_ALBCN);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_PSCTL, PSCTL_ALBCN);
}
/* enable power saving hw function */
- MACvRegBitsOn(priv->port_offset, MAC_REG_PSCTL, PSCTL_PSEN);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_PSCTL, PSCTL_PSEN);
priv->bEnablePSMode = true;
priv->bPWBitOn = true;
@@ -98,13 +98,13 @@ void PSvDisablePowerSaving(struct vnt_private *priv)
MACbPSWakeup(priv);
/* clear AutoSleep */
- MACvRegBitsOff(priv->port_offset, MAC_REG_PSCFG, PSCFG_AUTOSLEEP);
+ vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_PSCFG, PSCFG_AUTOSLEEP);
/* clear HWUTSF */
- MACvRegBitsOff(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_HWUTSF);
+ vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_HWUTSF);
/* set always listen beacon */
- MACvRegBitsOn(priv->port_offset, MAC_REG_PSCTL, PSCTL_ALBCN);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_PSCTL, PSCTL_ALBCN);
priv->bEnablePSMode = false;
@@ -135,8 +135,7 @@ bool PSbIsNextTBTTWakeUp(struct vnt_private *priv)
if (priv->wake_up_count == 1) {
/* Turn on wake up to listen next beacon */
- MACvRegBitsOn(priv->port_offset,
- MAC_REG_PSCTL, PSCTL_LNBCN);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_PSCTL, PSCTL_LNBCN);
wake_up = true;
}
}
diff --git a/drivers/staging/vt6655/rf.c b/drivers/staging/vt6655/rf.c
index ee5e2e0d9a8c..1fadc2fc4412 100644
--- a/drivers/staging/vt6655/rf.c
+++ b/drivers/staging/vt6655/rf.c
@@ -171,7 +171,7 @@ bool IFRFbWriteEmbedded(struct vnt_private *priv, unsigned long dwData)
unsigned short ww;
unsigned long dwValue;
- VNSvOutPortD(iobase + MAC_REG_IFREGCTL, dwData);
+ iowrite32((u32)dwData, iobase + MAC_REG_IFREGCTL);
/* W_MAX_TIMEOUT is the timeout period */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
@@ -209,10 +209,10 @@ static bool RFbAL2230Init(struct vnt_private *priv)
/* 3-wire control for normal mode */
iowrite8(0, iobase + MAC_REG_SOFTPWRCTL);
- MACvWordRegBitsOn(iobase, MAC_REG_SOFTPWRCTL, (SOFTPWRCTL_SWPECTI |
- SOFTPWRCTL_TXPEINV));
+ vt6655_mac_word_reg_bits_on(iobase, MAC_REG_SOFTPWRCTL,
+ (SOFTPWRCTL_SWPECTI | SOFTPWRCTL_TXPEINV));
/* PLL Off */
- MACvWordRegBitsOff(iobase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3);
+ vt6655_mac_word_reg_bits_off(iobase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3);
/* patch abnormal AL2230 frequency output */
IFRFbWriteEmbedded(priv, (0x07168700 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW));
@@ -222,7 +222,7 @@ static bool RFbAL2230Init(struct vnt_private *priv)
MACvTimer0MicroSDelay(priv, 30); /* delay 30 us */
/* PLL On */
- MACvWordRegBitsOn(iobase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3);
+ vt6655_mac_word_reg_bits_on(iobase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3);
MACvTimer0MicroSDelay(priv, 150);/* 150us */
ret &= IFRFbWriteEmbedded(priv, (0x00d80f00 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW));
@@ -232,10 +232,10 @@ static bool RFbAL2230Init(struct vnt_private *priv)
ret &= IFRFbWriteEmbedded(priv,
al2230_init_table[CB_AL2230_INIT_SEQ - 1]);
- MACvWordRegBitsOn(iobase, MAC_REG_SOFTPWRCTL, (SOFTPWRCTL_SWPE3 |
- SOFTPWRCTL_SWPE2 |
- SOFTPWRCTL_SWPECTI |
- SOFTPWRCTL_TXPEINV));
+ vt6655_mac_word_reg_bits_on(iobase, MAC_REG_SOFTPWRCTL, (SOFTPWRCTL_SWPE3 |
+ SOFTPWRCTL_SWPE2 |
+ SOFTPWRCTL_SWPECTI |
+ SOFTPWRCTL_TXPEINV));
/* 3-wire control for power saving mode */
iowrite8(PSSIG_WPE3 | PSSIG_WPE2, iobase + MAC_REG_PSPWRSIG);
@@ -350,7 +350,7 @@ bool rf_write_wake_prog_syn(struct vnt_private *priv, unsigned char rf_type,
unsigned char sleep_count = 0;
unsigned short idx = MISCFIFO_SYNDATA_IDX;
- VNSvOutPortW(iobase + MAC_REG_MISCFFNDEX, 0);
+ iowrite16(0, iobase + MAC_REG_MISCFFNDEX);
switch (rf_type) {
case RF_AIROHA:
case RF_AL2230S:
diff --git a/drivers/staging/vt6655/rxtx.c b/drivers/staging/vt6655/rxtx.c
index 85cd01c463e8..5bdb5176772c 100644
--- a/drivers/staging/vt6655/rxtx.c
+++ b/drivers/staging/vt6655/rxtx.c
@@ -1420,11 +1420,11 @@ static int vnt_beacon_xmit(struct vnt_private *priv,
priv->wBCNBufLen = sizeof(*short_head) + skb->len;
- MACvSetCurrBCNTxDescAddr(priv->port_offset, priv->tx_beacon_dma);
+ iowrite32((u32)priv->tx_beacon_dma, priv->port_offset + MAC_REG_BCNDMAPTR);
- MACvSetCurrBCNLength(priv->port_offset, priv->wBCNBufLen);
+ iowrite16(priv->wBCNBufLen, priv->port_offset + MAC_REG_BCNDMACTL + 2);
/* Set auto Transmit on */
- MACvRegBitsOn(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX);
+ vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX);
/* Poll Transmit the adapter */
iowrite8(BEACON_READY, priv->port_offset + MAC_REG_BCNDMACTL);
diff --git a/drivers/staging/vt6655/srom.c b/drivers/staging/vt6655/srom.c
index 722a2cc9a473..ee5ca4db74dc 100644
--- a/drivers/staging/vt6655/srom.c
+++ b/drivers/staging/vt6655/srom.c
@@ -27,7 +27,7 @@
*
*/
-#include "upc.h"
+#include "device.h"
#include "mac.h"
#include "srom.h"
diff --git a/drivers/staging/vt6655/upc.h b/drivers/staging/vt6655/upc.h
deleted file mode 100644
index 2a47f5782b71..000000000000
--- a/drivers/staging/vt6655/upc.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
- * All rights reserved.
- *
- * Purpose: Macros to access device
- *
- * Author: Tevin Chen
- *
- * Date: Mar 17, 1997
- *
- */
-
-#ifndef __UPC_H__
-#define __UPC_H__
-
-#include "device.h"
-
-/*--------------------- Export Definitions -------------------------*/
-
-/* For memory mapped IO */
-
-#define VNSvOutPortW(dwIOAddress, wData) \
- iowrite16((u16)(wData), dwIOAddress)
-
-#define VNSvOutPortD(dwIOAddress, dwData) \
- iowrite32((u32)(dwData), dwIOAddress)
-
-/*--------------------- Export Classes ----------------------------*/
-
-/*--------------------- Export Variables --------------------------*/
-
-/*--------------------- Export Functions --------------------------*/
-
-#endif /* __UPC_H__ */
generated by cgit v1.2.3 (git 2.39.0) at 2024-07-30 19:29:23 +0300