diff options
Diffstat (limited to 'tools/perf/pmu-events/arch/x86/ivytown/memory.json')
-rw-r--r-- | tools/perf/pmu-events/arch/x86/ivytown/memory.json | 121 |
1 files changed, 0 insertions, 121 deletions
diff --git a/tools/perf/pmu-events/arch/x86/ivytown/memory.json b/tools/perf/pmu-events/arch/x86/ivytown/memory.json index 99b71e43acad..138d1aa0b32d 100644 --- a/tools/perf/pmu-events/arch/x86/ivytown/memory.json +++ b/tools/perf/pmu-events/arch/x86/ivytown/memory.json @@ -1,8 +1,6 @@ [ { "BriefDescription": "Counts the number of machine clears due to memory order conflicts.", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3,4,5,6,7", "EventCode": "0xC3", "EventName": "MACHINE_CLEARS.MEMORY_ORDERING", "SampleAfterValue": "100003", @@ -10,8 +8,6 @@ }, { "BriefDescription": "Loads with latency value being above 128", - "Counter": "3", - "CounterHTOff": "3", "EventCode": "0xCD", "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_128", "MSRIndex": "0x3F6", @@ -19,13 +15,10 @@ "PEBS": "2", "PublicDescription": "Loads with latency value being above 128.", "SampleAfterValue": "1009", - "TakenAlone": "1", "UMask": "0x1" }, { "BriefDescription": "Loads with latency value being above 16", - "Counter": "3", - "CounterHTOff": "3", "EventCode": "0xCD", "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_16", "MSRIndex": "0x3F6", @@ -33,13 +26,10 @@ "PEBS": "2", "PublicDescription": "Loads with latency value being above 16.", "SampleAfterValue": "20011", - "TakenAlone": "1", "UMask": "0x1" }, { "BriefDescription": "Loads with latency value being above 256", - "Counter": "3", - "CounterHTOff": "3", "EventCode": "0xCD", "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_256", "MSRIndex": "0x3F6", @@ -47,13 +37,10 @@ "PEBS": "2", "PublicDescription": "Loads with latency value being above 256.", "SampleAfterValue": "503", - "TakenAlone": "1", "UMask": "0x1" }, { "BriefDescription": "Loads with latency value being above 32", - "Counter": "3", - "CounterHTOff": "3", "EventCode": "0xCD", "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_32", "MSRIndex": "0x3F6", @@ -61,13 +48,10 @@ "PEBS": "2", "PublicDescription": "Loads with latency value being above 32.", "SampleAfterValue": "100007", - "TakenAlone": "1", "UMask": "0x1" }, { "BriefDescription": "Loads with latency value being above 4", - "Counter": "3", - "CounterHTOff": "3", "EventCode": "0xCD", "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_4", "MSRIndex": "0x3F6", @@ -75,13 +59,10 @@ "PEBS": "2", "PublicDescription": "Loads with latency value being above 4.", "SampleAfterValue": "100003", - "TakenAlone": "1", "UMask": "0x1" }, { "BriefDescription": "Loads with latency value being above 512", - "Counter": "3", - "CounterHTOff": "3", "EventCode": "0xCD", "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_512", "MSRIndex": "0x3F6", @@ -89,13 +70,10 @@ "PEBS": "2", "PublicDescription": "Loads with latency value being above 512.", "SampleAfterValue": "101", - "TakenAlone": "1", "UMask": "0x1" }, { "BriefDescription": "Loads with latency value being above 64", - "Counter": "3", - "CounterHTOff": "3", "EventCode": "0xCD", "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_64", "MSRIndex": "0x3F6", @@ -103,13 +81,10 @@ "PEBS": "2", "PublicDescription": "Loads with latency value being above 64.", "SampleAfterValue": "2003", - "TakenAlone": "1", "UMask": "0x1" }, { "BriefDescription": "Loads with latency value being above 8", - "Counter": "3", - "CounterHTOff": "3", "EventCode": "0xCD", "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_8", "MSRIndex": "0x3F6", @@ -117,25 +92,18 @@ "PEBS": "2", "PublicDescription": "Loads with latency value being above 8.", "SampleAfterValue": "50021", - "TakenAlone": "1", "UMask": "0x1" }, { "BriefDescription": "Sample stores and collect precise store operation via PEBS record. PMC3 only.", - "Counter": "3", - "CounterHTOff": "3", "EventCode": "0xCD", "EventName": "MEM_TRANS_RETIRED.PRECISE_STORE", "PEBS": "2", - "PRECISE_STORE": "1", "SampleAfterValue": "2000003", - "TakenAlone": "1", "UMask": "0x2" }, { "BriefDescription": "Speculative cache line split load uops dispatched to L1 cache", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3,4,5,6,7", "EventCode": "0x05", "EventName": "MISALIGN_MEM_REF.LOADS", "PublicDescription": "Speculative cache-line split load uops dispatched to L1D.", @@ -144,8 +112,6 @@ }, { "BriefDescription": "Speculative cache line split STA uops dispatched to L1 cache", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3,4,5,6,7", "EventCode": "0x05", "EventName": "MISALIGN_MEM_REF.STORES", "PublicDescription": "Speculative cache-line split Store-address uops dispatched to L1D.", @@ -154,349 +120,262 @@ }, { "BriefDescription": "Counts all demand & prefetch code reads that miss the LLC", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.ALL_CODE_RD.LLC_MISS.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3fffc00244", - "Offcore": "1", "SampleAfterValue": "100003", "UMask": "0x1" }, { "BriefDescription": "Counts all demand & prefetch code reads that miss the LLC and the data returned from remote dram", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.ALL_CODE_RD.LLC_MISS.REMOTE_DRAM", "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x67f800244", - "Offcore": "1", "SampleAfterValue": "100003", "UMask": "0x1" }, { "BriefDescription": "Counts all demand & prefetch code reads that miss the LLC and the data forwarded from remote cache", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.ALL_CODE_RD.LLC_MISS.REMOTE_HIT_FORWARD", "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x87f800244", - "Offcore": "1", "SampleAfterValue": "100003", "UMask": "0x1" }, { "BriefDescription": "Counts all demand & prefetch data reads that hits the LLC", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.LLC_MISS.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3fffc20091", - "Offcore": "1", "SampleAfterValue": "100003", "UMask": "0x1" }, { "BriefDescription": "Counts all data/code/rfo reads (demand & prefetch) that hit the LLC", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.ALL_READS.LLC_MISS.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3fffc203f7", - "Offcore": "1", "SampleAfterValue": "100003", "UMask": "0x1" }, { "BriefDescription": "Counts all data/code/rfo reads (demand & prefetch) that miss the LLC and the data returned from local dram", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.ALL_READS.LLC_MISS.LOCAL_DRAM", "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x6004003f7", - "Offcore": "1", "SampleAfterValue": "100003", "UMask": "0x1" }, { "BriefDescription": "Counts all data/code/rfo reads (demand & prefetch) that miss the LLC the data is found in M state in remote cache and forwarded from there", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.ALL_READS.LLC_MISS.REMOTE_HITM", "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x107fc003f7", - "Offcore": "1", "SampleAfterValue": "100003", "UMask": "0x1" }, { "BriefDescription": "Counts all data/code/rfo reads (demand & prefetch) that miss the LLC and the data forwarded from remote cache", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.ALL_READS.LLC_MISS.REMOTE_HIT_FORWARD", "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x87f8203f7", - "Offcore": "1", "SampleAfterValue": "100003", "UMask": "0x1" }, { "BriefDescription": "Counts all demand code reads that miss the LLC", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.LLC_MISS.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3fffc20004", - "Offcore": "1", "SampleAfterValue": "100003", "UMask": "0x1" }, { "BriefDescription": "Counts all demand code reads that miss the LLC and the data returned from local dram", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.LLC_MISS.LOCAL_DRAM", "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x600400004", - "Offcore": "1", "SampleAfterValue": "100003", "UMask": "0x1" }, { "BriefDescription": "Counts all demand code reads that miss the LLC and the data returned from remote dram", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.LLC_MISS.REMOTE_DRAM", "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x67f800004", - "Offcore": "1", "SampleAfterValue": "100003", "UMask": "0x1" }, { "BriefDescription": "Counts all demand code reads that miss the LLC the data is found in M state in remote cache and forwarded from there", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.LLC_MISS.REMOTE_HITM", "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x107fc00004", - "Offcore": "1", "SampleAfterValue": "100003", "UMask": "0x1" }, { "BriefDescription": "Counts all demand code reads that miss the LLC and the data forwarded from remote cache", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.LLC_MISS.REMOTE_HIT_FORWARD", "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x87f820004", - "Offcore": "1", "SampleAfterValue": "100003", "UMask": "0x1" }, { "BriefDescription": "Counts demand data reads that miss the LLC and the data returned from remote & local dram", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_MISS.ANY_DRAM", "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x67fc00001", - "Offcore": "1", "SampleAfterValue": "100003", "UMask": "0x1" }, { "BriefDescription": "Counts demand data reads that miss in the LLC", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_MISS.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3fffc20001", - "Offcore": "1", "SampleAfterValue": "100003", "UMask": "0x1" }, { "BriefDescription": "Counts demand data reads that miss the LLC and the data returned from local dram", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_MISS.LOCAL_DRAM", "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x600400001", - "Offcore": "1", "SampleAfterValue": "100003", "UMask": "0x1" }, { "BriefDescription": "Counts demand data reads that miss the LLC and the data returned from remote dram", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_MISS.REMOTE_DRAM", "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x67f800001", - "Offcore": "1", "SampleAfterValue": "100003", "UMask": "0x1" }, { "BriefDescription": "Counts demand data reads that miss the LLC the data is found in M state in remote cache and forwarded from there", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_MISS.REMOTE_HITM", "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x107fc00001", - "Offcore": "1", "SampleAfterValue": "100003", "UMask": "0x1" }, { "BriefDescription": "Counts demand data reads that miss the LLC and the data forwarded from remote cache", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_MISS.REMOTE_HIT_FORWARD", "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x87f820001", - "Offcore": "1", "SampleAfterValue": "100003", "UMask": "0x1" }, { "BriefDescription": "Counts all demand data writes (RFOs) that miss the LLC and the data is found in M state in remote cache and forwarded from there.", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.LLC_MISS.REMOTE_HITM", "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x107fc20002", - "Offcore": "1", "SampleAfterValue": "100003", "UMask": "0x1" }, { "BriefDescription": "Counts all prefetch (that bring data to L2) code reads that miss the LLC and the data returned from remote & local dram", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.LLC_MISS.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3fffc20040", - "Offcore": "1", "SampleAfterValue": "100003", "UMask": "0x1" }, { "BriefDescription": "Counts prefetch (that bring data to L2) data reads that miss the LLC and the data returned from remote & local dram", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.LLC_MISS.ANY_DRAM", "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x67fc00010", - "Offcore": "1", "SampleAfterValue": "100003", "UMask": "0x1" }, { "BriefDescription": "Counts prefetch (that bring data to L2) data reads that miss in the LLC", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.LLC_MISS.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3fffc20010", - "Offcore": "1", "SampleAfterValue": "100003", "UMask": "0x1" }, { "BriefDescription": "Counts prefetch (that bring data to L2) data reads that miss the LLC and the data returned from local dram", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.LLC_MISS.LOCAL_DRAM", "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x600400010", - "Offcore": "1", "SampleAfterValue": "100003", "UMask": "0x1" }, { "BriefDescription": "Counts prefetch (that bring data to L2) data reads that miss the LLC and the data returned from remote dram", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.LLC_MISS.REMOTE_DRAM", "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x67f800010", - "Offcore": "1", "SampleAfterValue": "100003", "UMask": "0x1" }, { "BriefDescription": "Counts prefetch (that bring data to L2) data reads that miss the LLC the data is found in M state in remote cache and forwarded from there", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.LLC_MISS.REMOTE_HITM", "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x107fc00010", - "Offcore": "1", "SampleAfterValue": "100003", "UMask": "0x1" }, { "BriefDescription": "Counts prefetch (that bring data to L2) data reads that miss the LLC and the data forwarded from remote cache", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.LLC_MISS.REMOTE_HIT_FORWARD", "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x87f820010", - "Offcore": "1", "SampleAfterValue": "100003", "UMask": "0x1" }, { "BriefDescription": "Counts all prefetch (that bring data to LLC only) code reads that miss in the LLC", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.PF_LLC_CODE_RD.LLC_MISS.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3fffc20200", - "Offcore": "1", "SampleAfterValue": "100003", "UMask": "0x1" }, { "BriefDescription": "Counts prefetch (that bring data to LLC only) data reads that miss in the LLC", - "Counter": "0,1,2,3", - "CounterHTOff": "0,1,2,3", "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.PF_LLC_DATA_RD.LLC_MISS.ANY_RESPONSE", "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3fffc20080", - "Offcore": "1", "SampleAfterValue": "100003", "UMask": "0x1" } |