summaryrefslogtreecommitdiff
path: root/tools/perf/pmu-events/arch/x86/nehalemep/floating-point.json
diff options
context:
space:
mode:
Diffstat (limited to 'tools/perf/pmu-events/arch/x86/nehalemep/floating-point.json')
-rw-r--r--tools/perf/pmu-events/arch/x86/nehalemep/floating-point.json28
1 files changed, 0 insertions, 28 deletions
diff --git a/tools/perf/pmu-events/arch/x86/nehalemep/floating-point.json b/tools/perf/pmu-events/arch/x86/nehalemep/floating-point.json
index 666e466d351c..c03f8990fa82 100644
--- a/tools/perf/pmu-events/arch/x86/nehalemep/floating-point.json
+++ b/tools/perf/pmu-events/arch/x86/nehalemep/floating-point.json
@@ -1,7 +1,6 @@
[
{
"BriefDescription": "X87 Floating point assists (Precise Event)",
- "Counter": "0,1,2,3",
"EventCode": "0xF7",
"EventName": "FP_ASSIST.ALL",
"PEBS": "1",
@@ -10,7 +9,6 @@
},
{
"BriefDescription": "X87 Floating poiint assists for invalid input value (Precise Event)",
- "Counter": "0,1,2,3",
"EventCode": "0xF7",
"EventName": "FP_ASSIST.INPUT",
"PEBS": "1",
@@ -19,7 +17,6 @@
},
{
"BriefDescription": "X87 Floating point assists for invalid output value (Precise Event)",
- "Counter": "0,1,2,3",
"EventCode": "0xF7",
"EventName": "FP_ASSIST.OUTPUT",
"PEBS": "1",
@@ -28,7 +25,6 @@
},
{
"BriefDescription": "MMX Uops",
- "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "FP_COMP_OPS_EXE.MMX",
"SampleAfterValue": "2000000",
@@ -36,7 +32,6 @@
},
{
"BriefDescription": "SSE2 integer Uops",
- "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "FP_COMP_OPS_EXE.SSE2_INTEGER",
"SampleAfterValue": "2000000",
@@ -44,7 +39,6 @@
},
{
"BriefDescription": "SSE* FP double precision Uops",
- "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "FP_COMP_OPS_EXE.SSE_DOUBLE_PRECISION",
"SampleAfterValue": "2000000",
@@ -52,7 +46,6 @@
},
{
"BriefDescription": "SSE and SSE2 FP Uops",
- "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "FP_COMP_OPS_EXE.SSE_FP",
"SampleAfterValue": "2000000",
@@ -60,7 +53,6 @@
},
{
"BriefDescription": "SSE FP packed Uops",
- "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "FP_COMP_OPS_EXE.SSE_FP_PACKED",
"SampleAfterValue": "2000000",
@@ -68,7 +60,6 @@
},
{
"BriefDescription": "SSE FP scalar Uops",
- "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "FP_COMP_OPS_EXE.SSE_FP_SCALAR",
"SampleAfterValue": "2000000",
@@ -76,7 +67,6 @@
},
{
"BriefDescription": "SSE* FP single precision Uops",
- "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "FP_COMP_OPS_EXE.SSE_SINGLE_PRECISION",
"SampleAfterValue": "2000000",
@@ -84,7 +74,6 @@
},
{
"BriefDescription": "Computational floating-point operations executed",
- "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "FP_COMP_OPS_EXE.X87",
"SampleAfterValue": "2000000",
@@ -92,7 +81,6 @@
},
{
"BriefDescription": "All Floating Point to and from MMX transitions",
- "Counter": "0,1,2,3",
"EventCode": "0xCC",
"EventName": "FP_MMX_TRANS.ANY",
"SampleAfterValue": "2000000",
@@ -100,7 +88,6 @@
},
{
"BriefDescription": "Transitions from MMX to Floating Point instructions",
- "Counter": "0,1,2,3",
"EventCode": "0xCC",
"EventName": "FP_MMX_TRANS.TO_FP",
"SampleAfterValue": "2000000",
@@ -108,7 +95,6 @@
},
{
"BriefDescription": "Transitions from Floating Point to MMX instructions",
- "Counter": "0,1,2,3",
"EventCode": "0xCC",
"EventName": "FP_MMX_TRANS.TO_MMX",
"SampleAfterValue": "2000000",
@@ -116,7 +102,6 @@
},
{
"BriefDescription": "128 bit SIMD integer pack operations",
- "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "SIMD_INT_128.PACK",
"SampleAfterValue": "200000",
@@ -124,7 +109,6 @@
},
{
"BriefDescription": "128 bit SIMD integer arithmetic operations",
- "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "SIMD_INT_128.PACKED_ARITH",
"SampleAfterValue": "200000",
@@ -132,7 +116,6 @@
},
{
"BriefDescription": "128 bit SIMD integer logical operations",
- "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "SIMD_INT_128.PACKED_LOGICAL",
"SampleAfterValue": "200000",
@@ -140,7 +123,6 @@
},
{
"BriefDescription": "128 bit SIMD integer multiply operations",
- "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "SIMD_INT_128.PACKED_MPY",
"SampleAfterValue": "200000",
@@ -148,7 +130,6 @@
},
{
"BriefDescription": "128 bit SIMD integer shift operations",
- "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "SIMD_INT_128.PACKED_SHIFT",
"SampleAfterValue": "200000",
@@ -156,7 +137,6 @@
},
{
"BriefDescription": "128 bit SIMD integer shuffle/move operations",
- "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "SIMD_INT_128.SHUFFLE_MOVE",
"SampleAfterValue": "200000",
@@ -164,7 +144,6 @@
},
{
"BriefDescription": "128 bit SIMD integer unpack operations",
- "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "SIMD_INT_128.UNPACK",
"SampleAfterValue": "200000",
@@ -172,7 +151,6 @@
},
{
"BriefDescription": "SIMD integer 64 bit pack operations",
- "Counter": "0,1,2,3",
"EventCode": "0xFD",
"EventName": "SIMD_INT_64.PACK",
"SampleAfterValue": "200000",
@@ -180,7 +158,6 @@
},
{
"BriefDescription": "SIMD integer 64 bit arithmetic operations",
- "Counter": "0,1,2,3",
"EventCode": "0xFD",
"EventName": "SIMD_INT_64.PACKED_ARITH",
"SampleAfterValue": "200000",
@@ -188,7 +165,6 @@
},
{
"BriefDescription": "SIMD integer 64 bit logical operations",
- "Counter": "0,1,2,3",
"EventCode": "0xFD",
"EventName": "SIMD_INT_64.PACKED_LOGICAL",
"SampleAfterValue": "200000",
@@ -196,7 +172,6 @@
},
{
"BriefDescription": "SIMD integer 64 bit packed multiply operations",
- "Counter": "0,1,2,3",
"EventCode": "0xFD",
"EventName": "SIMD_INT_64.PACKED_MPY",
"SampleAfterValue": "200000",
@@ -204,7 +179,6 @@
},
{
"BriefDescription": "SIMD integer 64 bit shift operations",
- "Counter": "0,1,2,3",
"EventCode": "0xFD",
"EventName": "SIMD_INT_64.PACKED_SHIFT",
"SampleAfterValue": "200000",
@@ -212,7 +186,6 @@
},
{
"BriefDescription": "SIMD integer 64 bit shuffle/move operations",
- "Counter": "0,1,2,3",
"EventCode": "0xFD",
"EventName": "SIMD_INT_64.SHUFFLE_MOVE",
"SampleAfterValue": "200000",
@@ -220,7 +193,6 @@
},
{
"BriefDescription": "SIMD integer 64 bit unpack operations",
- "Counter": "0,1,2,3",
"EventCode": "0xFD",
"EventName": "SIMD_INT_64.UNPACK",
"SampleAfterValue": "200000",