Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2023-09-01 | riscv: mm: dma-noncoherent: nonstandard cache operations support | Lad Prabhakar | 1 | -0/+43 |
2023-09-01 | riscv: dma-mapping: switch over to generic implementation | Lad Prabhakar | 1 | -9/+51 |
2023-09-01 | riscv: dma-mapping: skip invalidation before bidirectional DMA | Arnd Bergmann | 1 | -1/+1 |
2023-09-01 | riscv: dma-mapping: only invalidate after DMA, not flush | Arnd Bergmann | 1 | -1/+1 |
2023-07-06 | riscv: mm: mark noncoherent_supported as __ro_after_init | Jisheng Zhang | 1 | -1/+1 |
2022-10-21 | RISC-V: Fix compilation without RISCV_ISA_ZICBOM | Andrew Jones | 1 | -41/+0 |
2022-10-02 | RISC-V: KVM: Provide UAPI for Zicbom block size | Andrew Jones | 1 | -0/+2 |
2022-09-13 | RISC-V: Clean up the Zicbom block size probing | Palmer Dabbelt | 1 | -10/+13 |
2022-08-11 | riscv: implement Zicbom-based CMO instructions + the t-head variant | Palmer Dabbelt | 1 | -0/+116 |
2022-07-29 | riscv: Add support for non-coherent devices using zicbom extension | Heiko Stuebner | 1 | -0/+112 |