summaryrefslogtreecommitdiff
path: root/arch/xtensa/platforms/iss/include
AgeCommit message (Expand)AuthorFilesLines
2021-04-05xtensa: ISS: add GDBIO implementation to semihosting interfaceMax Filippov2-0/+70
2021-04-05xtensa: ISS: split simcall implementation from semihosting interfaceMax Filippov2-68/+75
2021-04-05xtensa: simcall.h: Change compitible to compatibleBhaskar Chowdhury1-1/+1
2020-02-07Merge tag 'xtensa-20200206' of git://github.com/jcmvbkbc/linux-xtensaLinus Torvalds1-5/+3
2020-02-05xtensa: ISS: improve simcall assemblyMax Filippov1-5/+3
2019-12-18xtensa: ISS: avoid struct timevalArnd Bergmann1-2/+2
2018-08-20xtensa: drop unneeded platform/hardware.h headersMax Filippov1-18/+0
2018-08-20xtensa: rework {CONFIG,PLATFORM}_DEFAULT_MEM_STARTMax Filippov1-10/+0
2018-08-20xtensa: drop unused {CONFIG,PLATFORM}_DEFAULT_MEM_SIZEMax Filippov1-1/+0
2017-03-13xtensa: ISS: add argc/argv simcall definitionsMax Filippov1-0/+20
2016-09-21xtensa: ISS: define simc_exit and use it instead of inline asmMax Filippov1-0/+5
2013-05-09xtensa: don't use a7 in simcallsMax Filippov1-11/+13
2012-12-19xtensa: properly fix missing compiler barrier in simcallMax Filippov1-6/+1
2012-12-19xtensa: ISS: add BASE_BAUD definition to serial.hMax Filippov1-0/+15
2012-10-16xtensa: ISS: fix specific simcallsMax Filippov1-2/+7
2012-10-04xtensa: ISS: add dummy serial.h for ISS platformMax Filippov1-0/+0
2012-10-04xtensa: ISS: fix __simc implementationMax Filippov1-0/+53
2008-11-06xtensa: move headers files to arch/xtensa/includeChris Zankel2-0/+91