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2023-05-26arm64: dts: qcom: sc7180: Add stream-id of qspi to iommusVijaya Krishna Nivarthi1-0/+1
As part of DMA mode support to qspi driver. Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1682328761-17517-3-git-send-email-quic_vnivarth@quicinc.com
2023-05-26arm64: dts: qcom: msm8996: correct /soc/bus rangesKrzysztof Kozlowski1-1/+1
The bus@0 node should have reg or ranges to fix dtbs W=1 warnings: Warning (unit_address_vs_reg): /soc@0/bus@0: node has a unit name, but no reg or ranges property Warning (simple_bus_reg): /soc@0/bus@0: missing or empty reg/ranges property Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: Konrad Dybcio <konrad.dybcio@linaro.org> # MSM8996 Kagura Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230420180746.860934-1-krzysztof.kozlowski@linaro.org
2023-05-26arm64: dts: qcom: sdm630-nile: correct duplicated reserved memory nodeKrzysztof Kozlowski1-5/+4
SoC DTSI already comes with 85800000 reserved memory node, so assume the author wanted to update its length. This fixes dtbs W=1 warning: Warning (unique_unit_address_if_enabled): /reserved-memory/qhee-code@85800000: duplicate unit-address (also used in node /reserved-memory/reserved@85800000) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230419211921.79871-1-krzysztof.kozlowski@linaro.org
2023-05-26arm64: dts: qcom: sm6125-sprout: align ADC channel node names with bindingsKrzysztof Kozlowski1-4/+4
Bindings expect ADC channel node names to follow specific pattern: sm6125-xiaomi-laurel-sprout.dtb: adc@3100: 'adc-chan@4d', 'adc-chan@4e', 'adc-chan@52', 'adc-chan@54' do not match any of the regexes: ... Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230416123730.300863-6-krzysztof.kozlowski@linaro.org
2023-05-26arm64: dts: qcom: sm8550-qrd: add missing PCIE1 PHY AUX clock frequencyKrzysztof Kozlowski1-0/+4
The SM8550 DTSI defines a fixed PCIE1 PHY AUX clock and expects boards to define frequency. Use the same as in MTP8550 to fix: sm8550-qrd.dtb: pcie-1-phy-aux-clk: 'clock-frequency' is a required property Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230416123730.300863-5-krzysztof.kozlowski@linaro.org
2023-05-26arm64: dts: qcom: sm8250: add missing qcom,smmu-500 fallbackKrzysztof Kozlowski1-1/+1
Since commit 6c84bbd103d8 ("dt-bindings: arm-smmu: Add generic qcom,smmu-500 bindings") the SMMU is supposed to use qcom,smmu-500 compatible fallback: ['qcom,sm8250-smmu-500', 'qcom,adreno-smmu', 'qcom,smmu-500', 'arm,mmu-500'] is too long 'qcom,sm8250-smmu-500' is not one of ['qcom,msm8996-smmu-v2', 'qcom,msm8998-smmu-v2', 'qcom,sdm630-smmu-v2'] 'qcom,sm8250-smmu-500' is not one of ['qcom,msm8996-smmu-v2', 'qcom,sc7180-smmu-v2', 'qcom,sdm630-smmu-v2', 'qcom,sdm845-smmu-v2' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230416123730.300863-4-krzysztof.kozlowski@linaro.org
2023-05-26arm64: dts: qcom: qdu1000: add missing qcom,smmu-500 fallbackKrzysztof Kozlowski1-1/+1
Since commit 6c84bbd103d8 ("dt-bindings: arm-smmu: Add generic qcom,smmu-500 bindings") the SMMU is supposed to use qcom,smmu-500 compatible fallback: ['qcom,qdu1000-smmu-500', 'arm,mmu-500'] is too short ['qcom,qdu1000-smmu-500', 'arm,mmu-500'] is too long Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230416123730.300863-3-krzysztof.kozlowski@linaro.org
2023-05-26arm64: dts: qcom: ipq8074: drop incorrect SPI bus spi-max-frequencyKrzysztof Kozlowski1-1/+0
The spi-max-frequency property belongs to SPI devices, not SPI controller: ipq8074-hk01.dtb: spi@78b5000: Unevaluated properties are not allowed ('spi-max-frequency' was unexpected) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230416123730.300863-2-krzysztof.kozlowski@linaro.org
2023-05-26arm64: dts: qcom: ipq6018: drop incorrect SPI bus spi-max-frequencyKrzysztof Kozlowski1-2/+0
The spi-max-frequency property belongs to SPI devices, not SPI controller: ipq6018-cp01-c1.dtb: spi@78b5000: Unevaluated properties are not allowed ('spi-max-frequency' was unexpected) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230416123730.300863-1-krzysztof.kozlowski@linaro.org
2023-05-26arm64: dts: qcom: add few more reserved memory regionVignesh Viswanathan2-5/+25
In IPQ SoCs, bootloader will collect the system RAM contents upon crash for the post morterm analysis. If we don't reserve the memory region used by bootloader, obviously linux will consume it and upon next boot on crash, bootloader will be loaded in the same region, which will lead to loose some of the data, sometimes we may miss out critical information. So lets reserve the region used by the bootloader. Similarly SBL copies some data into the reserved region and it will be used in the crash scenario. So reserve 1MB for SBL as well. While at it, drop the size padding in the reserved memory region, wherever applicable. Signed-off-by: Vignesh Viswanathan <quic_viswanat@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526110653.27777-4-quic_viswanat@quicinc.com
2023-05-26arm64: dts: qcom: enable the download mode supportVignesh Viswanathan2-0/+7
Like any other Qualcomm SoCs, IPQ8074 and IPQ6018 also supports the download mode to collect the RAM dumps if system crashes, to perform the post mortem analysis. Add support for the same. Signed-off-by: Vignesh Viswanathan <quic_viswanat@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526110653.27777-3-quic_viswanat@quicinc.com
2023-05-26arm64: dts: qcom: sm8450: add crypto nodesNeil Armstrong1-0/+28
Add crypto engine (CE) and CE BAM related nodes and definitions for the SM8450 SoC. Tested-by: Anders Roxell <anders.roxell@linaro.org> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> [Bhupesh: Corrected the compatible list] Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526192210.3146896-12-bhupesh.sharma@linaro.org
2023-05-26arm64: dts: qcom: sm8350: Add Crypto Engine supportBhupesh Sharma1-0/+22
Add crypto engine (CE) and CE BAM related nodes and definitions to 'sm8350.dtsi'. Co-developed-by and Signed-off-by: Robert Foss <rfoss@kernel.org> [Bhupesh: Switch to '#interconnect-cells = <2>', available since commit 4f287e31ff5f] Tested-by: Anders Roxell <anders.roxell@linaro.org> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526192210.3146896-11-bhupesh.sharma@linaro.org
2023-05-26arm64: dts: qcom: sm8250: Add Crypto Engine supportBhupesh Sharma1-0/+32
Add crypto engine (CE) and CE BAM related nodes and definitions to 'sm8250.dtsi'. Co-developed-by and Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Tested-by: Anders Roxell <anders.roxell@linaro.org> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526192210.3146896-10-bhupesh.sharma@linaro.org
2023-05-26arm64: dts: qcom: sm8150: Add Crypto Engine supportBhupesh Sharma1-0/+30
Add crypto engine (CE) and CE BAM related nodes and definitions to 'sm8150.dtsi'. Tested-by: Anders Roxell <anders.roxell@linaro.org> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526192210.3146896-9-bhupesh.sharma@linaro.org
2023-05-26arm64: dts: qcom: sm6115: Add Crypto Engine supportBhupesh Sharma1-0/+31
Add crypto engine (CE) and CE BAM related nodes and definitions to 'sm6115.dtsi'. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Anders Roxell <anders.roxell@linaro.org> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526192210.3146896-8-bhupesh.sharma@linaro.org
2023-05-26arm64: dts: qcom: sdm845: Fix the slimbam DMA engine compatible stringBhupesh Sharma1-1/+1
As per documentation, Qualcomm SDM845 SoC supports SLIMBAM DMA engine v1.7.4, so use the correct compatible strings. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Anders Roxell <anders.roxell@linaro.org> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526192210.3146896-5-bhupesh.sharma@linaro.org
2023-05-26arm64: dts: qcom: sdm8550: Fix the BAM DMA engine compatible stringBhupesh Sharma1-1/+1
As per documentation, Qualcomm SM8550 SoC supports BAM DMA engine v1.7.4, so use the correct compatible strings. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Anders Roxell <anders.roxell@linaro.org> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526192210.3146896-4-bhupesh.sharma@linaro.org
2023-05-26arm64: dts: qcom: ipq9574: add QFPROM nodeKathiravan T1-0/+7
IPQ9574 has efuse region to determine the various HW quirks. Lets add the initial support and the individual fuses will be added as they are required. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526125305.19626-5-quic_kathirav@quicinc.com
2023-05-26arm64: dts: qcom: ipq6018: add QFPROM nodeKathiravan T1-0/+7
IPQ6018 has efuse region to determine the various HW quirks. Lets add the initial support and the individual fuses will be added as they are required. Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526125305.19626-4-quic_kathirav@quicinc.com
2023-05-26arm64: dts: qcom: ipq5332: add QFPROM nodeKathiravan T1-0/+7
IPQ5332 has efuse region to determine the various HW quirks. Lets add the initial support and the individual fuses will be added as they are required. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526125305.19626-3-quic_kathirav@quicinc.com
2023-05-26arm64: dts: qcom: ipq9574: add support for RDP453 variantDevi Priya2-0/+81
Add the initial device tree support for the Reference Design Platform (RDP) 453 based on IPQ9574 family of SoCs. This patch adds support for Console UART, SPI NOR and SMPA1 regulator node. Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526153152.777-3-quic_devipriy@quicinc.com
2023-05-26arm64: dts: qcom: ipq9574: add support for RDP449 variantDevi Priya2-0/+81
Add the initial device tree support for the Reference Design Platform (RDP) 449 based on IPQ9574 family of SoCs. This patch adds support for Console UART, SPI NOR and SMPA1 regulator node. Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230516135013.3547-3-quic_devipriy@quicinc.com
2023-05-26arm64: dts: qcom: ipq9574: add support for RDP418 variantDevi Priya2-0/+125
Add the initial device tree support for the Reference Design Platform (RDP) 418 based on IPQ9574 family of SoCs. This patch adds support for Console UART, SPI NOR, eMMC and SMPA1 regulator node. Co-developed-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230510104359.16678-3-quic_devipriy@quicinc.com
2023-05-26arm64: dts: qcom: ipq9574: Add cpufreq supportDevi Priya1-1/+59
Add cpu freq nodes in the device tree to bump cpu frequency above 800MHz. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Co-developed-by: Praveenkumar I <quic_ipkumar@quicinc.com> Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230517172527.1968-4-quic_devipriy@quicinc.com
2023-05-26arm64: dts: qcom: ipq9574: Add SMPA1 regulator nodeDevi Priya1-0/+19
Add support for SMPA1 regulator node in IPQ9574. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Co-developed-by: Praveenkumar I <quic_ipkumar@quicinc.com> Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230517172527.1968-3-quic_devipriy@quicinc.com
2023-05-26arm64: dts: qcom: ipq9574: Add RPM related nodesDevi Priya1-0/+17
Add RPM Glink & RPM message RAM nodes to support frequency scaling on IPQ9574. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Co-developed-by: Praveenkumar I <quic_ipkumar@quicinc.com> Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230517172527.1968-2-quic_devipriy@quicinc.com
2023-05-26arm64: dts: qcom: ipq9574: Add support for APSS clock controllerDevi Priya1-0/+18
Add the APCS & A73 PLL nodes to support CPU frequency scaling. Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230406061314.10916-5-quic_devipriy@quicinc.com
2023-05-26arm64: dts: qcom: ipq9574: rename al02-c7 dts to rdp433Devi Priya2-2/+2
Rename the dts after Reference Design Platform(RDP) to adopt standard naming convention. Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230425084010.15581-7-quic_devipriy@quicinc.com
2023-05-26arm64: dts: qcom: pm7250b: add missing spmi-vadc includeLuca Weiss1-0/+1
This file is using definitions from the spmi-vadc header, so we need to include it. Fixes: 11975b9b8135 ("arm64: dts: qcom: Add pm7250b PMIC") Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230407-pm7250b-sid-v1-1-fc648478cc25@fairphone.com
2023-05-25arm64: dts: qcom: Add msm8939 Sony Xperia M4 AquaBryan O'Donoghue2-0/+184
Add a basic booting DTS for the Sony Xperia M4 Aqua aka "tulip". Tulip is paired with: - wcn3660 - smb1360 battery charger - 720p Truly NT35521 Panel Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230407194905.611461-6-bryan.odonoghue@linaro.org
2023-05-25arm64: dts: qcom: Add Square apq8039-t2 boardBryan O'Donoghue2-0/+493
The apq8039-t2 is an apq8039 based board paired with a wcn3680b WiFi chipset. Co-developed-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Co-developed-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Jun Nie <jun.nie@linaro.org> Co-developed-by: Benjamin Li <benl@squareup.com> Signed-off-by: Benjamin Li <benl@squareup.com> Co-developed-by: James Willcox <jwillcox@squareup.com> Signed-off-by: James Willcox <jwillcox@squareup.com> Co-developed-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Leo Yan <leo.yan@linaro.org> Co-developed-by: Joseph Gates <jgates@squareup.com> Signed-off-by: Joseph Gates <jgates@squareup.com> Co-developed-by: Max Chen <mchen@squareup.com> Signed-off-by: Max Chen <mchen@squareup.com> Co-developed-by: Zac Crosby <zac@squareup.com> Signed-off-by: Zac Crosby <zac@squareup.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230407194905.611461-5-bryan.odonoghue@linaro.org
2023-05-25arm64: dts: qcom: Add msm8939-pm8916.dtsi includeStephan Gerhold1-0/+82
The msm8939-pm8916.dtsi include configures the regulator supplies of MSM8939 used together with PM8916, as recommended by Qualcomm. In rare cases where boards deviate from the recommended design they can just avoid using this include. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230407194905.611461-4-bryan.odonoghue@linaro.org
2023-05-25arm64: dts: qcom: Add msm8939 SoCBryan O'Donoghue1-0/+2452
Add msm8939 a derivative SoC of msm8916. This SoC contains a number of key differences to msm8916. - big.LITTLE Octa Core - quad 1.5GHz + quad 1.0GHz - DRAM 1x800 LPDDR3 - Camera 4+4 lane CSI - Venus @ 1080p60 HEVC - DSI x 2 - Adreno A405 - WiFi wcn3660/wcn3680b 802.11ac Co-developed-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Co-developed-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Jun Nie <jun.nie@linaro.org> Co-developed-by: Benjamin Li <benl@squareup.com> Signed-off-by: Benjamin Li <benl@squareup.com> Co-developed-by: James Willcox <jwillcox@squareup.com> Signed-off-by: James Willcox <jwillcox@squareup.com> Co-developed-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Leo Yan <leo.yan@linaro.org> Co-developed-by: Joseph Gates <jgates@squareup.com> Signed-off-by: Joseph Gates <jgates@squareup.com> Co-developed-by: Max Chen <mchen@squareup.com> Signed-off-by: Max Chen <mchen@squareup.com> Co-developed-by: Zac Crosby <zac@squareup.com> Signed-off-by: Zac Crosby <zac@squareup.com> Co-developed-by: Vincent Knecht <vincent.knecht@mailoo.org> Signed-off-by: Vincent Knecht <vincent.knecht@mailoo.org> Co-developed-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230407194905.611461-3-bryan.odonoghue@linaro.org
2023-05-25arm64: dts: qcom: sdm632-fairphone-fp3: Add notification LEDLuca Weiss1-0/+29
The phone features a notification LED connected to the pmi632. Configure the RGB led found on it. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230414-pmi632-v3-2-079d2cada699@z3ntu.xyz
2023-05-25arm64: dts: qcom: Add PMI632 PMICLuca Weiss1-0/+165
The PMI632, commonly found on SoCs with SDM632 has various standard functions like ADC, GPIOs, LPG and more. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230414-pmi632-v3-1-079d2cada699@z3ntu.xyz
2023-05-25arm64: dts: qcom: sdm845-shift-axolotl: enable flash LEDsDylan Van Assche1-0/+22
The SHIFT6mq (axolotl) is an SDM845-based smartphone with 2 flash LEDs. One LED is white, the other one is yellow. Define both LEDs in the DTS so they can be used as flash or torch and enable the flash LED controller to control them in PMI8998. Signed-off-by: Dylan Van Assche <me@dylanvanassche.be> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230518133113.273880-4-me@dylanvanassche.be
2023-05-25arm64: dts: qcom: pmi8998: add flash LED controllerDylan Van Assche1-0/+6
Qualcomm PMIC PMI8998 has a 3 channel flash LED driver which is used by many phones for 1 or 2 flash LEDs. Each LED can be used in flash mode or torch mode. Add the flash LED controller node to PMI8998 DTS. Signed-off-by: Dylan Van Assche <me@dylanvanassche.be> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230518133113.273880-3-me@dylanvanassche.be
2023-05-25arm64: dts: qcom: sm6115: Add CPU idle-statesBhupesh Sharma1-0/+136
Add CPU idle-state nodes and power-domains in Qualcomm sm6115 SoC dtsi. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230518080031.2509250-1-bhupesh.sharma@linaro.org
2023-05-25arm64: dts: qcom: msm8916-pm8916: Mark always-on regulatorsStephan Gerhold2-5/+5
Some of the regulators must be always-on to ensure correct operation of the system, e.g. PM8916 L2 for the LPDDR RAM, L5 for most digital I/O and L7 for the CPU PLL (strictly speaking the CPU PLL might only need an active-only vote but this is not supported for regulators in mainline currently). The RPM firmware seems to enforce that internally, these supplies stay on even if we vote for them to power off (and there is no other processor running). This means it's pointless to keep sending enable/disable requests because they will just be ignored. Also, drivers are much more likely to get a wrong impression of the regulator status, because regulator_is_enabled() will return false when there are no users, even though the regulator is always on. Describe this properly by marking the regulators as always-on. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230510-msm8916-regulators-v1-8-54d4960a05fc@gerhold.net
2023-05-25arm64: dts: qcom: msm8916: Define regulator constraints next to usageStephan Gerhold15-1478/+210
Right now each MSM8916 device has a huge block of regulator constraints with allowed voltages for each regulator. For lack of better documentation these voltages are often copied as-is from the vendor device tree, without much extra thought. Unfortunately, the voltages in the vendor device trees are often misleading or even wrong, e.g. because: - There is a large voltage range allowed and the actual voltage is only set somewhere hidden in some messy vendor driver. This is often the case for pm8916_{l14,l15,l16} because they have a broad range of 1.8-3.3V by default. - The voltage is actually wrong but thanks to the voltage constraints in the RPM firmware it still ends up applying the correct voltage. To have proper regulator constraints it is important to review them in context of the usage. The current setup in the MSM8916 device trees makes this quite hard because each device duplicates the standard voltages for components of the SoC and mixes those with minor device-specific additions and dummy voltages for completely unused regulators. The actual usage of the regulators for the SoC components is in msm8916-pm8916.dtsi, so it can and should also define the related voltage constraints. These are not board-specific but defined in the APQ8016E/PM8916 Device Specification. The board DT can then focus on describing the actual board-specific regulators, which makes it much easier to review and spot potential mistakes there. Note that this commit does not make any functional change. All used regulators still have the same regulator constraints as before. Unused regulators do not have regulator constraints anymore because most of these were too broad or even entirely wrong. They should be added back with proper voltage constraints when there is an actual usage. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230510-msm8916-regulators-v1-7-54d4960a05fc@gerhold.net
2023-05-25arm64: dts: qcom: msm8916-pm8916: Clarify purposeStephan Gerhold1-0/+8
Goal of the msm8916-pm8916.dtsi is to reduce the boilerplate necessary to create a device tree for a typical board with the MSM8916 SoC combined with the PM8916 PMIC. > 99% of all MSM8916 boards use the same standard setup where many of the PM8916 regulators have a fixed purpose and only some are left up for board-specific use. While MSM8916 (and perhaps MSM8939 soon) is currently the only platform with such an include, it has definitely proven useful. With more than 30 boards using it (not all of them upstream yet) it simplifies the review a lot and reduces the chance of configuring the standard components incorrectly. In preparation of extending its scope slightly, add a comment at the top that clearly explains what the .dtsi represents and when it should (or should not) be used. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230510-msm8916-regulators-v1-6-54d4960a05fc@gerhold.net
2023-05-25arm64: dts: qcom: pm8916: Move default regulator "-supply"sStephan Gerhold2-3/+6
Some of the power supplies for the analog audio codec in PM8916 are wired externally. While most boards use the regulators currently specified in pm8916.dtsi, in theory it could be connected differently. We already have msm8916-pm8916.dtsi that models that standard setup used by most devices so move the -supply properties there and keep the base pm8916.dtsi independent. Currently all MSM8916 boards in mainline make use of msm8916-pm8916.dtsi, so it is not necessary to adjust any other boards. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230510-msm8916-regulators-v1-5-54d4960a05fc@gerhold.net
2023-05-25arm64: dts: qcom: msm8916: Disable audio codecs by defaultStephan Gerhold4-0/+12
Not every device has something connected to the digital audio codec in MSM8916 and/or the analog audio codec in PM8916. Disable those by default so the hardware is only powered up when necessary. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230510-msm8916-regulators-v1-4-54d4960a05fc@gerhold.net
2023-05-25arm64: dts: qcom: msm8916: Fix regulator constraintsStephan Gerhold13-89/+89
The regulator constraints for most MSM8916 devices (except DB410c) were originally taken from Qualcomm's msm-3.10 vendor device tree (for lack of better documentation). Unfortunately it turns out that Qualcomm's voltages are slightly off as well and do not match the voltage constraints applied by the RPM firmware. This means that we sometimes request a specific voltage but the RPM firmware actually applies a much lower or higher voltage. This is particularly critical for pm8916_l11 which is used as SD card VMMC regulator: The SD card can choose a voltage from the current range of 1.8 - 2.95V. If it chooses to run at 1.8V we pretend that this is fine but the RPM firmware will still silently end up configuring 2.95V. This can be easily reproduced with a multimeter or by checking the SPMI hardware registers of the regulator. Fix this by making the voltages match the actual "specified range" in the PM8916 Device Specification which is enforced by the RPM firmware. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230510-msm8916-regulators-v1-3-54d4960a05fc@gerhold.net
2023-05-25arm64: dts: qcom: apq8016-sbc: Fix 1.8V power rail on LS expansionStephan Gerhold1-4/+12
The 96Boards specification expects a 1.8V power rail on the low-speed expansion connector that is able to provide at least 0.18W / 100 mA. According to the DB410c hardware user manual this is done by connecting both L15 and L16 in parallel with up to 55mA each (for 110 mA total) [1]. Unfortunately the current regulator setup in the DB410c device tree does not implement the specification correctly and only provides 5 mA: - Only L15 is marked always-on, so L16 is never enabled. - Without specifying a load the regulator is put into LPM where it can only provide 5 mA. Fix this by: - Adding proper voltage constraints for L16. - Making L16 always-on. - Adding regulator-system-load for both L15 and L16. 100 mA should be available in total, so specify 50 mA for each. (The regulator hardware can only be in normal (55 mA) or low-power mode (5 mA) so this will actually result in the expected 110 mA total...) [1]: https://www.96boards.org/documentation/consumer/dragonboard/dragonboard410c/hardware-docs/hardware-user-manual.md.html#power-supplies Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Fixes: 828dd5d66f0f ("arm64: dts: apq8016-sbc: make 1.8v available on LS expansion") Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230510-msm8916-regulators-v1-2-54d4960a05fc@gerhold.net
2023-05-25arm64: dts: qcom: apq8016-sbc: Fix regulator constraintsStephan Gerhold1-32/+32
For some reason DB410c has completely bogus regulator constraints that actually just correspond to the programmable voltages which are already provided by the regulator driver. Some of them are not just outside the recommended operating conditions of the APQ8016E SoC but even exceed the absolute maximum ratings, potentially risking permanent device damage. In practice it's not quite as dangerous thanks to the RPM firmware: It turns out that it has its own voltage constraints and silently clamps all regulator requests. For example, requesting 3.3V for L5 (allowed by the current regulator constraints!) still results in 1.8V being programmed in the actual regulator hardware. Experimentation with various voltages shows that the internal RPM voltage constraints roughly correspond to the safe "specified range" in the PM8916 Device Specification (rather than the "programmable range" used inside apq8016-sbc.dtsi right now). Combine those together with some fixed voltages used in the old msm-3.10 device tree from Qualcomm to give DB410c some actually valid voltage constraints. Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Fixes: 4c7d53d16d77 ("arm64: dts: apq8016-sbc: add regulators support") Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230510-msm8916-regulators-v1-1-54d4960a05fc@gerhold.net
2023-05-25arm64: dts: qcom: sm8250-xiaomi-elish: remove redundant empty lineJianhua Lu1-1/+0
Remove a redundant empty line introduced by commit 51c4c2bd6f31 ("arm64: dts: qcom: sm8250-xiaomi-elish-boe: Add mdss and dsi panel") Signed-off-by: Jianhua Lu <lujianhua000@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230517133340.21111-1-lujianhua000@gmail.com
2023-05-25arm64: dts: qcom: ipq9574: add few device nodesKathiravan T1-0/+202
Add QUP(SPI / I2C) peripheral, PRNG, WDOG and the remaining UART nodes. While at it, enable the SPI NOR in RDP433 board. Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230517072806.13170-1-quic_kathirav@quicinc.com
2023-05-25arm64: dts: qcom: sm8550-qrd: add display and panelKrzysztof Kozlowski1-0/+68
Enable Display Subsystem with Visionox VTDR6130 Panel (same as on MTP8550). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230516154539.238655-3-krzysztof.kozlowski@linaro.org
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