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path: root/drivers/clk/rockchip/clk-rk3228.c
AgeCommit message (Expand)AuthorFilesLines
2021-03-21clk: rockchip: support more core div settingElaine Zhang1-3/+4
2020-08-19clk: rockchip: Fix initialization of mux_pll_src_4plls_pNathan Chancellor1-1/+1
2020-04-13clk: rockchip: fix incorrect configuration of rk3228 aclk_gpu* clocksJustin Swartz1-13/+4
2019-07-17Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds1-1/+2
2019-06-27clk: rockchip: export HDMIPHY clock on rk3228Heiko Stuebner1-1/+1
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157Thomas Gleixner1-10/+1
2019-05-20clk: rockchip: add 1.464GHz cpu-clock rate to rk3228Justin Swartz1-0/+1
2019-05-15clk: Remove io.h from clk-provider.hStephen Boyd1-0/+1
2018-03-23clk: rockchip: Fix wrong parent for SDMMC phase clock for rk3228Shawn Lin1-1/+1
2017-08-22clk: rockchip: add rk3228 SCLK_SDIO_SRC clk idElaine Zhang1-1/+1
2017-06-02clk: rockchip: mark noc and some special clk as critical on rk3228Elaine Zhang1-1/+29
2017-06-02clk: rockchip: export more rk3228 clocks idsElaine Zhang1-46/+46
2017-05-17clk: rockchip: fix up the RK3228 clk cpu setting tableElaine Zhang1-12/+30
2016-07-01clk: rockchip: export rk3228 MAC clocksXing Zheng1-11/+11
2016-07-01clk: rockchip: rename rk3228 sclk_macphy_50m to sclk_mac_extclkXing Zheng1-3/+3
2016-07-01clk: rockchip: export rk3228 audio clocksXing Zheng1-4/+4
2016-07-01clk: rockchip: include rk3228 downstream muxes into fractional dividersXing Zheng1-29/+52
2016-06-22clk: rockchip: fix incorrect rk3228 clock registersXing Zheng1-9/+9
2016-03-27clk: rockchip: release io resource when failing to init clkShawn Lin1-0/+1
2016-03-27clk: rockchip: Add support for multiple clock providersXing Zheng1-5/+12
2016-03-27clk: rockchip: allow varying mux parameters for cpuclk pll-sourcesXing Zheng1-0/+3
2016-02-26clk: rockchip: set the clock ids for RK3228 HDMIYakir Yang1-4/+4
2016-02-26clk: rockchip: set the clock ids for RK3228 VOPYakir Yang1-3/+3
2016-02-26clk: rockchip: add the tsadc clocks found on rk3228 SoCsCaesar Wang1-2/+2
2016-02-04clk: rockchip: convert manually created factor clocks to the new typeHeiko Stuebner1-27/+5
2016-01-28clk: rockchip: fix wrong mmc phase shift for rk3228Shawn Lin1-3/+3
2015-12-21clk: rockchip: only enter pll slow-mode directly before reboots on rk3288Heiko Stuebner1-1/+1
2015-12-12clk: rockchip: add clock controller for rk3228Jeffy Chen1-0/+678