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path: root/drivers/clk/socfpga/clk.c
AgeCommit message (Expand)AuthorFilesLines
2019-05-21treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 13Thomas Gleixner1-13/+1
2015-05-22clk: socfpga: add a clock driver for the Arria 10 platformDinh Nguyen1-1/+6
2014-04-30clk: socfpga: fix clock driver for 3.15Dinh Nguyen1-20/+3
2014-03-19clk: socfpga: Fix section mismatch warningDinh Nguyen1-1/+1
2014-02-19clk: socfpga: split clk codeSteffen Trumtrar1-306/+2
2014-02-19clk: socfpga: fix define typoSteffen Trumtrar1-3/+3
2014-02-19clk: socfpga: remove unused fieldSteffen Trumtrar1-1/+0
2014-02-19clk: socfpga: Remove socfpga_init_clocksDinh Nguyen1-10/+0
2014-02-19clk: socfpga: Look for the GPIO_DB_CLK by its offsetDinh Nguyen1-2/+3
2014-02-19clk: socfpga: Map the clk manager base address in the clock driverDinh Nguyen1-4/+16
2013-12-20clk: socfpga: Use NULL instead of 0Sachin Kamat1-1/+1
2013-11-28clk: socfpga: Remove check for "reg" property in socfpga_clk_initDinh Nguyen1-3/+1
2013-10-08clk: socfpga: Fix incorrect sdmmc clock nameDinh Nguyen1-1/+1
2013-06-12ARM: socfpga: Add support to gate peripheral clocksDinh Nguyen1-9/+185
2013-04-15ARM: socfpga: Upgrade clk driver for socfpga to make use of dts clock entriesDinh Nguyen1-21/+142
2012-07-19ARM: socfpga: initial support for Altera's SOCFPGA platformDinh Nguyen1-0/+51