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path: root/drivers/clk/tegra/clk-dfll.c
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2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174Thomas Gleixner1-10/+1
2019-03-14Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds1-9/+9
2019-02-22clk: tegra: dfll: Fix debugfs_simple_attr.cocci warningsYueHaibing1-9/+9
2019-02-06clk: tegra: dfll: round down voltages based on alignmentJoseph Lo1-8/+13
2019-02-06clk: tegra: dfll: support PWM regulator controlJoseph Lo1-67/+377
2018-11-29clk: tegra: Change to use DEFINE_SHOW_ATTRIBUTE macroYangtao Li1-11/+1
2018-10-17clk: tegra: probe deferral error reportingMarcel Ziswiler1-2/+6
2018-06-02clk: tegra: no need to check return value of debugfs_create functionsGreg Kroah-Hartman1-31/+11
2017-11-01clk: tegra: dfll: Fix drvdata overwriting issueNicolin Chen1-5/+5
2017-01-30PM / OPP: Update OPP users to put referenceViresh Kumar1-11/+6
2016-04-28clk: tegra: dfll: Reference CVB table instead of copying dataThierry Reding1-5/+6
2016-03-03clk: tegra: Remove CLK_IS_ROOTStephen Boyd1-1/+0
2015-10-20Merge tag 'tegra-for-4.4-clk' of git://git.kernel.org/pub/scm/linux/kernel/gi...Michael Turquette1-57/+57
2015-10-20clk: tegra: dfll: Monitor code is DEBUG_FS onlyThierry Reding1-50/+49
2015-09-17clk: tegra: dfll: Properly protect OPP listThierry Reding1-1/+7
2015-09-15clk: tegra: Unlock top rates for Tegra124 DFLL clockMikko Perttunen1-7/+8
2015-08-26clk: tegra: Fix some static checker problemsStephen Boyd1-3/+5
2015-07-16clk: tegra: Add Tegra124 DFLL clocksource platform driverTuomas Tynkkynen1-3/+3
2015-07-16clk: tegra: Add closed loop support for the DFLLTuomas Tynkkynen1-3/+663
2015-07-16clk: tegra: Add library for the DFLL clock source (open-loop mode)Tuomas Tynkkynen1-0/+1095