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The CSI2RX subsystem uses PSI-L DMA to transfer frames to memory. It can
have up to 32 threads per instance. J721S2 has two instances of the
subsystem, so there are 64 threads total, Add them to the endpoint map.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20240125111449.855876-1-vaishnav.a@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
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Add PSI-L thread map for main CPSW2G.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@gmail.com>
Link: https://lore.kernel.org/r/20230511034704.656155-1-s-vadapalli@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
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Add endpoint configuration for the four ingress and two egress
threads for main domain crypto accelerator.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Link: https://lore.kernel.org/r/20220628050232.331956-1-j-choudhary@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
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Add support for J721S2 SOC.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@gmail.com>
Link: https://lore.kernel.org/r/20211119132315.15901-3-a-govindraju@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
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