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path: root/drivers/gpu/drm/i915/display/intel_display.c
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2022-05-11Merge tag 'drm-intel-next-2022-05-06' of git://anongit.freedesktop.org/drm/dr...Dave Airlie1-124/+52
2022-05-05drm/i915: Use drm_mode_init() for on-stack modesVille Syrjälä1-2/+3
2022-04-25drm/i915: Add crtc .crtc_get_shared_dpll()Ville Syrjälä1-0/+4
2022-04-25drm/i915: Move stuff into intel_dpll_crtc_compute_clock()Ville Syrjälä1-2/+1
2022-04-25drm/i915: Adjust .crtc_compute_clock() calling conventionVille Syrjälä1-1/+1
2022-04-25drm/i915: Remove pointless dpll_funcs checksVille Syrjälä1-4/+0
2022-04-25drm/i915: Pass dev_priv to intel_shared_dpll_init()Ville Syrjälä1-1/+1
2022-04-25drm: Rename dp/ to display/Thomas Zimmermann1-1/+1
2022-04-20drm/i915: Sanitize the port -> DDI/AUX power domain mapping for each platformImre Deak1-80/+5
2022-04-20drm/i915: Convert the u64 power well domains mask to a bitmapImre Deak1-31/+34
2022-04-20drm/i915: Rename the power domain names to end with pipes/portsImre Deak1-17/+17
2022-04-20drm/i915: Program i830 DPLL FP register laterVille Syrjälä1-3/+3
2022-04-13drm/i915/fbc: Introduce intel_fbc_sanitize()Ville Syrjälä1-0/+2
2022-04-13drm/i915/fbc: Remove intel_fbc_global_disable()Ville Syrjälä1-2/+0
2022-04-12drm/i915/dg2: Add support for DG2 clear color compressionJuha-Pekka Heikkilä1-1/+3
2022-03-30drm/i915/display/adlp: Fix programing of PIPE_MBUS_DBOX_CTLJosé Roberto de Souza1-40/+1
2022-03-30drm/i915/display/adlp: Adjust MBUS DBOX BW and B creditsCaz Yokoyama1-1/+4
2022-03-30drm/i915/display/tgl+: Set default values for all registers in PIPE_MBUS_DBOX...José Roberto de Souza1-3/+10
2022-03-30drm/i915: Move intel_vtd_active and run_as_guest to i915_utilsTvrtko Ursulin1-1/+7
2022-03-29drm/i915: Use DRM_MODE_FMT+DRM_MODE_ARG()Ville Syrjälä1-6/+6
2022-03-29drm/i915: Split color_commit() into noarm+arm pairVille Syrjälä1-6/+16
2022-03-29drm/i915: Make ilk+ pfit regiser unlockedVille Syrjälä1-9/+9
2022-03-22drm/i915: s/enable/active/ for DRRSVille Syrjälä1-2/+2
2022-03-21drm/i915: Pre-calculate plane relative data rateVille Syrjälä1-0/+5
2022-03-21drm/i915: Split plane data_rate into data_rate+data_rate_yVille Syrjälä1-0/+4
2022-03-21drm/i915: Tweak plane ddb allocation trackingVille Syrjälä1-4/+4
2022-03-16drm/i915: Do DRRS disable/enable during pre/post_plane_update()Ville Syrjälä1-7/+6
2022-03-16drm/i915: Use drm_mode_copy()Ville Syrjälä1-5/+10
2022-03-15drm/i915: Move DRRS enable/disable higher upVille Syrjälä1-0/+4
2022-03-15drm/i915: Stash DRRS state under intel_crtcVille Syrjälä1-1/+1
2022-03-10drm/i915: Program MSA timing delay on ilk/snb/ivbVille Syrjälä1-2/+6
2022-03-10drm/i915: Make the PIPESRC rect relative to the entire bigjoiner areaVille Syrjälä1-0/+21
2022-03-04drm/i915: Use bigjoiner_pipes moreVille Syrjälä1-11/+20
2022-03-04drm/i915: Eliminate bigjoiner booleanVille Syrjälä1-29/+23
2022-03-04drm/i915: Start tracking PIPESRC as a drm_rectVille Syrjälä1-18/+37
2022-03-04drm/i915: Relocate a few more pch transcoder bitsVille Syrjälä1-18/+1
2022-03-04drm/i915: Relocate ibx pch port sanitation codeVille Syrjälä1-62/+1
2022-03-04drm/i915: Remove framestart_delay sanitationVille Syrjälä1-56/+0
2022-03-04drm/i915: Move framestart_delay to crtc_stateVille Syrjälä1-10/+30
2022-03-03drm/i915: Pimp async flip debugsVille Syrjälä1-17/+42
2022-03-03drm/i915: Fix the async flip wm0/ddb optimizationVille Syrjälä1-16/+22
2022-03-03drm/i915: Check async flip capability early onVille Syrjälä1-7/+72
2022-03-03drm/i915/display/adlp: Remove code related to underrun recoverySwathi Dhanavanthri1-21/+0
2022-03-02drm/i915: Use str_on_off()Lucas De Marchi1-3/+4
2022-03-02drm/i915: Use str_enabled_disabled()Lucas De Marchi1-8/+8
2022-03-02drm/i915: Use str_yes_no()Lucas De Marchi1-11/+12
2022-02-25drm/i915: Fix MSO vs. bigjoiner timings confusionVille Syrjälä1-16/+30
2022-02-25drm/i915: Extract intel_crtc_compute_pipe_mode()Ville Syrjälä1-8/+20
2022-02-25drm/i915: Extract intel_crtc_compute_pipe_src()Ville Syrjälä1-23/+39
2022-02-25drm/i915: Extract intel_bigjoiner_adjust_timings()Ville Syrjälä1-23/+18
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