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path: root/drivers/gpu/drm/i915/display
AgeCommit message (Expand)AuthorFilesLines
2024-06-27drm/i915/mso: using joiner is not possible with eDP MSOJani Nikula1-0/+4
2024-06-21drm/i915: Fix audio component initializationImre Deak3-11/+24
2024-06-12pwm: Rename pwm_apply_state() to pwm_apply_might_sleep()Sean Young1-3/+3
2024-05-17drm/i915/bios: Fix parsing backlight BDB dataKarthikeyan Ramasubramanian2-20/+4
2024-05-17drm/i915/audio: Fix audio time stamp programming for DPChaitanya Kumar Borah1-105/+8
2024-04-27drm/i915/mst: Limit MST+DSC to TGL+Ville Syrjälä2-1/+2
2024-04-27drm/i915: Disable live M/N updates when using bigjoinerVille Syrjälä1-1/+5
2024-04-27drm/i915: Adjust seamless_m_n flag behaviourVille Syrjälä5-12/+17
2024-04-27drm/i915: Enable VRR later during fastsetsVille Syrjälä2-20/+36
2024-04-27drm/i915: Extract intel_crtc_vblank_evade_scanlines()Ville Syrjälä1-22/+31
2024-04-27drm/i915: Change intel_pipe_update_{start,end}() calling conventionVille Syrjälä3-10/+18
2024-04-27drm/i915/cdclk: Fix voltage_level programming edge caseVille Syrjälä1-10/+27
2024-04-27drm/i915/mst: Reject FEC+MST on ICLVille Syrjälä1-1/+2
2024-04-27drm/i915: Fix FEC pipe A vs. DDI A mixupVille Syrjälä1-2/+2
2024-04-17drm/i915: Disable port sync when bigjoiner is usedVille Syrjälä1-0/+5
2024-04-17drm/i915/cdclk: Fix CDCLK programming order when pipes are activeVille Syrjälä2-2/+8
2024-04-17drm/i915/vrr: Disable VRR when using bigjoinerVille Syrjälä1-0/+7
2024-04-10drm/i915: Eliminate IS_MTL_GRAPHICS_STEPMatt Roper1-2/+3
2024-04-10drm/i915: Pre-populate the cursor physical dma addressVille Syrjälä3-3/+12
2024-04-10drm/i915/display: Use i915_gem_object_get_dma_address to get dma addressMaarten Lankhorst1-2/+4
2024-04-03drm/i915: Do not match JSL in ehl_combo_pll_div_frac_wa_needed()Jonathon Hall1-1/+1
2024-04-03drm/i915/dsi: Go back to the previous INIT_OTP/DISPLAY_ON order, mostlyVille Syrjälä2-7/+39
2024-04-03drm/i915/bios: Tolerate devdata==NULL in intel_bios_encoder_supports_dp_dual_...Ville Syrjälä1-0/+3
2024-04-03drm/i915: Don't explode when the dig port we don't have an AUX CHVille Syrjälä1-3/+14
2024-04-03drm/i915: Add missing ; to __assign_str() macros in tracepoint codeSteven Rostedt (Google)1-3/+3
2024-03-01drm/i915/tv: Fix TV modeMaxime Ripard2-10/+10
2024-02-01drm/i915/psr: Only allow PSR in LPSP mode on HSW non-ULTVille Syrjälä1-2/+12
2024-02-01drm/i915/lnl: Remove watchdog timers for PSRMika Kahola1-3/+7
2024-02-01Revert "drm/i915/dsi: Do display on sequence later on icl+"Ville Syrjälä1-2/+1
2024-01-26drm/dp_mst: Fix fractional DSC bpp handlingVille Syrjälä1-3/+2
2024-01-10drm/i915: Call intel_pre_plane_updates() also for pipes getting enabledVille Syrjälä1-1/+2
2024-01-10drm/i915/dp: Fix passing the correct DPCD_REV for drm_dp_set_phy_test_patternKhaled Almahallawy1-1/+1
2024-01-01drm/i915/dmc: Don't enable any pipe DMC eventsVille Syrjälä1-2/+41
2024-01-01drm/i915: Reject async flips with bigjoinerVille Syrjälä1-0/+11
2024-01-01drm/i915/mtl: Fix HDMI/DP PLL clock selectionImre Deak1-1/+2
2024-01-01drm/i915/edp: don't write to DP_LINK_BW_SET when using rate selectJani Nikula1-10/+21
2024-01-01drm/i915: Introduce crtc_state->enhanced_framingVille Syrjälä8-7/+29
2024-01-01drm/i915: Fix FEC state dumpVille Syrjälä2-10/+5
2023-12-20drm/i915: Fix remapped stride with CCS on ADL+Ville Syrjälä1-2/+14
2023-12-20drm/i915: Fix intel_atomic_setup_scalers() plane_state handlingVille Syrjälä1-1/+1
2023-12-20drm/i915: Fix ADL+ tiled plane stride when the POT stride is smaller than the...Ville Syrjälä1-1/+2
2023-12-13drm/i915: Skip some timing checks on BXT/GLK DSI transcodersVille Syrjälä12-3/+79
2023-12-13drm/i915/mst: Reject modes that require the bigjoinerVille Syrjälä1-0/+4
2023-12-13drm/i915/mst: Fix .mode_valid_ctx() return valuesVille Syrjälä1-4/+8
2023-12-13drm/atomic-helpers: Invoke end_fb_access while owning plane stateThomas Zimmermann1-1/+1
2023-12-08drm/i915: Also check for VGA converter in eDP probeVille Syrjälä1-6/+22
2023-11-28drm/i915: Bump GLK CDCLK frequency when driving multiple pipesVille Syrjälä1-0/+12
2023-11-28drm/i915/mtl: Support HBR3 rate with C10 phy and eDP in MTLChaitanya Kumar Borah1-1/+1
2023-11-28drm/i915/tc: Fix -Wformat-truncation in intel_tc_port_initNirmoy Das1-3/+8
2023-10-18drm/i915/cx0: Only clear/set the Pipe Reset bit of the PHY Lanes OwnedKhaled Almahallawy1-2/+1
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