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path: root/drivers/gpu/drm/i915/intel_psr.c
AgeCommit message (Expand)AuthorFilesLines
2018-07-13drm/i915/psr: Remove few mod parameters option.Rodrigo Vivi1-10/+0
2018-07-13drm/i915: Use crtc_state->has_psr instead of CAN_PSR for pipe updateTarun Vyas1-1/+6
2018-07-02drm/i915/psr: Lockless version of psr_wait_for_idleTarun Vyas1-2/+34
2018-06-27drm/i915/psr: Enable CRC check in the static frame on the sink sideJosé Roberto de Souza1-1/+9
2018-06-27drm/i915/psr: Avoid PSR exit max time timeoutJosé Roberto de Souza1-1/+2
2018-06-27drm/i915/psr: Handle PSR errorsJosé Roberto de Souza1-1/+21
2018-06-27drm/i915/psr: Begin to handle PSR/PSR2 errors set by sinkJosé Roberto de Souza1-11/+51
2018-06-27drm/i915/psr: Remove intel_crtc_state parameter from disable_source()José Roberto de Souza1-3/+2
2018-06-26drm/i915/psr: Warn for erroneous enabling of both PSR1 and PSR2.Dhinakaran Pandiyan1-3/+2
2018-06-26drm/i915/psr: Fix race in intel_psr_work()Dhinakaran Pandiyan1-1/+1
2018-06-26drm/i915/psr: Kill useless function pointers.Rodrigo Vivi1-37/+18
2018-06-26drm/i915/ddi: Get AUX power domain for DP main link tooImre Deak1-41/+0
2018-06-21drm/i915: remove check for aux irqLucas De Marchi1-1/+1
2018-06-20drm/i915/psr: Fix warning in intel_psr_activate()Dhinakaran Pandiyan1-0/+1
2018-06-14drm/i915/psr: Kill delays when activating psr back.Rodrigo Vivi1-22/+7
2018-05-29drm/i915/psr: Set idle frame count based on sink synchronization latencyDhinakaran Pandiyan1-20/+20
2018-05-24drm/i915/psr: Fix ALPM cap check for PSR2Dhinakaran Pandiyan1-10/+10
2018-05-24drm/i915/psr: Fall back to max. synchronization latency if DPCD read failsDhinakaran Pandiyan1-2/+2
2018-05-24drm/i915/psr: Avoid unnecessary DPCD read of DP_PSR_CAPSDhinakaran Pandiyan1-10/+1
2018-05-24drm/i915/psr: Check for SET_POWER_CAPABLE bit at PSR init time.Dhinakaran Pandiyan1-6/+5
2018-05-24drm/i915/psr: Avoid DPCD reads when panel does not support PSRDhinakaran Pandiyan1-6/+8
2018-05-24drm/i915/psr: Nuke PSR support for VLV and CHVDhinakaran Pandiyan1-226/+22
2018-05-24drm/i915/psr: vbt change for psrVathsala Nagaraju1-19/+20
2018-05-09drm/i915/psr: Check if VBT says PSR can be enabled.Dhinakaran Pandiyan1-2/+5
2018-04-27drm/i915/psr/cnl: Set y-coordinate as valid in SDPJosé Roberto de Souza1-3/+2
2018-04-27drm/i915/psr/skl+: Print information about what caused a PSR exitJosé Roberto de Souza1-0/+45
2018-04-27drm/i915/psr: Prevent PSR exit when a non-pipe related register is writtenosé Roberto de Souza1-1/+2
2018-04-21drm/i915/psr: Timestamps for PSR entry and exit interrupts.Dhinakaran Pandiyan1-2/+7
2018-04-21drm/i915/psr: Control PSR interrupts via debugfsDhinakaran Pandiyan1-0/+58
2018-04-10drm/i915/psr: Chase psr.enabled only under the psr.lockChris Wilson1-38/+44
2018-03-30drm/i915/psr: Set DPCD PSR2 enable bit when neededJosé Roberto de Souza1-5/+6
2018-03-30drm/i915/psr: Cache sink synchronization latencyJosé Roberto de Souza1-12/+16
2018-03-30drm/i915/psr: Use PSR2 macro for PSR2José Roberto de Souza1-1/+1
2018-03-30drm/i915/psr: Do not override PSR2 sink supportJosé Roberto de Souza1-16/+17
2018-03-30drm/i915/psr/cnl: Enable Y-coordinate support in sourceJosé Roberto de Souza1-4/+12
2018-03-30drm/i915/psr: Tie PSR2 support to Y coordinate requirementJosé Roberto de Souza1-27/+19
2018-03-30drm/i915/psr: Nuke aux frame syncJosé Roberto de Souza1-23/+1
2018-03-21drm/i915/psr: Remove open-coded PSR AUX transactions for SKL+Dhinakaran Pandiyan1-33/+22
2018-03-21drm/i915/psr: Move PSR aux setup to it's own function.Dhinakaran Pandiyan1-11/+20
2018-03-14drm/i915: Move CUR SURFLIVE definition to a better place.Rodrigo Vivi1-2/+2
2018-03-13drm/i915/psr: Use more PSR HW tracking.Rodrigo Vivi1-1/+9
2018-03-12drm/i915/psr: Display WA 0884 applied broadly for more HW tracking.Rodrigo Vivi1-2/+17
2018-03-07drm/i915/psr: Update PSR2 resolution check for CannonlakeDhinakaran Pandiyan1-6/+15
2018-02-28drm/i915/psr: Don't avoid PSR when PSR2 conditions are not met.Rodrigo Vivi1-27/+37
2018-02-28drm/i915/psr2: Fix max resolution supported.Rodrigo Vivi1-3/+3
2018-02-27drm/i915/psr: Check for power state control capability.Dhinakaran Pandiyan1-0/+5
2018-02-27drm/i915/psr: Check for the specific AUX_FRAME_SYNC cap bit.Dhinakaran Pandiyan1-1/+1
2018-02-27drm/i915/psr: Extract PSR DPCD initialization and move it to intel_psr.cDhinakaran Pandiyan1-0/+68
2018-02-27drm/i915/psr: New power domain for AUX IO.Dhinakaran Pandiyan1-0/+41
2018-02-10drm/i915: Use INTEL_GEN everywhereTvrtko Ursulin1-2/+2
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