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path: root/drivers/gpu/drm/tegra/dp.h
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2019-10-28drm/tegra: dp: Add DisplayPort link training helperThierry Reding1-0/+68
Add a helper that will perform link training as described in the DisplayPort specification. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: dp: Add support for eDP link ratesThierry Reding1-0/+9
Parses additional link rates from DPCD if the sink supports eDP 1.4. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: dp: Add drm_dp_link_choose() helperThierry Reding1-0/+5
This helper chooses an appropriate configuration, according to the bitrate requirements of the video mode and the capabilities of the DisplayPort sink. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: dp: Read AUX read interval from DPCDThierry Reding1-0/+11
Store the AUX read interval from DPCD, so that it can be used to wait for the durations given in the specification during link training. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: dp: Read eDP version from DPCDThierry Reding1-0/+2
If the sink supports eDP, read the eDP revision from it's DPCD. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: dp: Read alternate scrambler reset capability from sinkThierry Reding1-0/+7
Parse from the sink capabilities whether or not the eDP alternate scrambler reset value of 0xfffe is supported. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: dp: Read channel coding capability from sinkThierry Reding1-0/+7
Parse from the sink capabilities whether or not it supports ANSI 8B/10B channel coding as specified in ANSI X3.230-1994, clause 11. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: dp: Read TPS3 capability from sinkThierry Reding1-0/+7
The TPS3 capability can be exposed by DP 1.2 and later sinks if they support the alternative training pattern for channel equalization. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: dp: Read fast training capability from linkThierry Reding1-0/+7
While probing the DisplayPort link, query the fast training capability. If supported, drivers can use the fast link training sequence instead of the more involved full link training sequence. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: dp: Turn link capabilities into booleansThierry Reding1-3/+19
Rather than storing capabilities as flags in an integer, use a separate boolean per capability. This simplifies the code that checks for these capabilities. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: dp: Track link capabilities alongside settingsThierry Reding1-5/+10
Store capabilities in max_* fields and add separate fields for the currently selected settings. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: Add missing kerneldoc for struct drm_dp_linkThierry Reding1-0/+7
The drm_dp_link structure tracks capabilities on the DP link. Add some kerneldoc to explain what each of its fields means. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-23drm/tegra: Move drm_dp_link helpers to Tegra DRMThierry Reding1-0/+26
During the discussion of patches that enhance the drm_dp_link helpers it was concluded that these helpers aren't very useful to begin with. After all other drivers have been converted not to use these helpers anymore, move these helpers into the last remaining user: Tegra DRM. If at some point these helpers are deemed more widely useful, they can be moved out into the DRM DP helpers again. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20191021143437.1477719-14-thierry.reding@gmail.com
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