index
:
kernel/linux.git
linux-2.6.11.y
linux-2.6.12.y
linux-2.6.13.y
linux-2.6.14.y
linux-2.6.15.y
linux-2.6.16.y
linux-2.6.17.y
linux-2.6.18.y
linux-2.6.19.y
linux-2.6.20.y
linux-2.6.21.y
linux-2.6.22.y
linux-2.6.23.y
linux-2.6.24.y
linux-2.6.25.y
linux-2.6.26.y
linux-2.6.27.y
linux-2.6.28.y
linux-2.6.29.y
linux-2.6.30.y
linux-2.6.31.y
linux-2.6.32.y
linux-2.6.33.y
linux-2.6.34.y
linux-2.6.35.y
linux-2.6.36.y
linux-2.6.37.y
linux-2.6.38.y
linux-2.6.39.y
linux-3.0.y
linux-3.1.y
linux-3.10.y
linux-3.11.y
linux-3.12.y
linux-3.13.y
linux-3.14.y
linux-3.15.y
linux-3.16.y
linux-3.17.y
linux-3.18.y
linux-3.19.y
linux-3.2.y
linux-3.3.y
linux-3.4.y
linux-3.5.y
linux-3.6.y
linux-3.7.y
linux-3.8.y
linux-3.9.y
linux-4.0.y
linux-4.1.y
linux-4.10.y
linux-4.11.y
linux-4.12.y
linux-4.13.y
linux-4.14.y
linux-4.15.y
linux-4.16.y
linux-4.17.y
linux-4.18.y
linux-4.19.y
linux-4.2.y
linux-4.20.y
linux-4.3.y
linux-4.4.y
linux-4.5.y
linux-4.6.y
linux-4.7.y
linux-4.8.y
linux-4.9.y
linux-5.0.y
linux-5.1.y
linux-5.10.y
linux-5.11.y
linux-5.12.y
linux-5.13.y
linux-5.14.y
linux-5.15.y
linux-5.16.y
linux-5.17.y
linux-5.18.y
linux-5.19.y
linux-5.2.y
linux-5.3.y
linux-5.4.y
linux-5.5.y
linux-5.6.y
linux-5.7.y
linux-5.8.y
linux-5.9.y
linux-6.0.y
linux-6.1.y
linux-6.10.y
linux-6.2.y
linux-6.3.y
linux-6.4.y
linux-6.5.y
linux-6.6.y
linux-6.7.y
linux-6.8.y
linux-6.9.y
linux-rockchip-6.1.y
linux-rockchip-6.5.y
linux-rolling-lts
linux-rolling-stable
master
Linux kernel stable tree (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
drivers
/
irqchip
/
irq-sifive-plic.c
Age
Commit message (
Expand
)
Author
Files
Lines
2021-04-07
irqchip/sifive-plic: Mark two global variables __ro_after_init
Jisheng Zhang
1
-2
/
+2
2020-11-01
irqchip/sifive-plic: Fix chip_data access within a hierarchy
Greentime Hu
1
-4
/
+4
2020-10-25
irqchip/sifive-plic: Fix broken irq_set_affinity() callback
Greentime Hu
1
-1
/
+1
2020-06-10
irqchip: RISC-V per-HART local interrupt controller driver
Anup Patel
1
-9
/
+23
2020-06-10
RISC-V: Rename and move plic_find_hart_id() to arch directory
Anup Patel
1
-15
/
+1
2020-05-25
irqchip/sifive-plic: Improve boot prints for multiple PLIC instances
Anup Patel
1
-2
/
+2
2020-05-25
irqchip/sifive-plic: Setup cpuhp once after boot CPU handler is present
Anup Patel
1
-2
/
+12
2020-05-25
irqchip/sifive-plic: Set default irq affinity in plic_irqdomain_map()
Anup Patel
1
-0
/
+3
2020-05-18
irqchip/sifive-plic: Remove incorrect requirement about number of irq contexts
Wesley W. Terpstra
1
-2
/
+0
2020-04-17
irqchip/sifive-plic: Fix maximum priority threshold value
Atish Patra
1
-1
/
+1
2020-03-16
irqchip/sifive-plic: Add support for multiple PLICs
Atish Patra
1
-30
/
+51
2020-03-16
irqchip/sifive-plic: Enable/Disable external interrupts upon cpu online/offline
Atish Patra
1
-4
/
+34
2020-01-24
Merge tag 'irqchip-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/...
Thomas Gleixner
1
-4
/
+26
2020-01-20
irqchip/sifive-plic: Support irq domain hierarchy
Yash Shah
1
-4
/
+26
2020-01-05
riscv: prefix IRQ_ macro names with an RV_ namespace
Paul Walmsley
1
-1
/
+1
2019-11-05
riscv: abstract out CSR names for supervisor vs machine mode
Christoph Hellwig
1
-4
/
+7
2019-10-25
Merge tag 'irqchip-fixes-5.4-2' of git://git.kernel.org/pub/scm/linux/kernel/...
Thomas Gleixner
1
-2
/
+2
2019-10-25
irqchip/sifive-plic: Skip contexts except supervisor in plic_init()
Alan Mikhak
1
-2
/
+2
2019-10-14
Merge tag 'irqchip-fixes-5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/...
Thomas Gleixner
1
-14
/
+15
2019-09-18
irqchip/sifive-plic: Switch to fasteoi flow
Marc Zyngier
1
-14
/
+15
2019-09-05
irqchip/sifive-plic: set max threshold for ignored handlers
Christoph Hellwig
1
-2
/
+10
2019-02-21
irqchip/sifive-plic: Implement irq_set_affinity() for SMP host
Anup Patel
1
-6
/
+39
2019-02-21
irqchip/sifive-plic: Differentiate between PLIC handler and context
Anup Patel
1
-8
/
+8
2019-02-21
irqchip/sifive-plic: Add warning in plic_init() if handler already present
Anup Patel
1
-0
/
+5
2019-02-21
irqchip/sifive-plic: Pre-compute context hart base and enable base
Anup Patel
1
-26
/
+21
2019-02-14
irqchip/irq-sifive-plic: Check and continue in case of an invalid cpuid.
Atish Patra
1
-0
/
+5
2018-10-23
RISC-V: Use Linux logical CPU number instead of hartid
Atish Patra
1
-3
/
+5
2018-10-23
RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartid
Palmer Dabbelt
1
-1
/
+1
2018-08-13
irqchip: add a SiFive PLIC driver
Christoph Hellwig
1
-0
/
+260