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path: root/drivers/phy/cadence
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2020-07-13phy: cadence: salvo: fix wrong bit definitionPeter Chen1-1/+1
2020-05-18phy: cadence: sierra: Fix for USB3 U1/U2 stateSanket Parmar1-13/+14
2020-05-15phy: phy-cadence-salvo: add phy .init APIPeter Chen1-1/+11
2020-05-07phy: cadence: salvo: add salvo phy driverPeter Chen3-0/+325
2020-03-20phy: cadence-torrent: Add support for subnode bindingsSwapnil Jakhade1-75/+217
2020-03-20phy: cadence-torrent: Add platform dependent initialization structureSwapnil Jakhade1-0/+9
2020-03-20phy: cadence-torrent: Use regmap to read and write DPTX PHY registersSwapnil Jakhade1-69/+100
2020-03-20phy: cadence-torrent: Use regmap to read and write Torrent PHY registersSwapnil Jakhade1-369/+650
2020-03-20phy: cadence-torrent: Implement PHY configure APIsSwapnil Jakhade1-5/+431
2020-03-20phy: cadence-torrent: Add 19.2 MHz reference clock supportSwapnil Jakhade1-17/+441
2020-03-20phy: cadence-torrent: Refactor code for reusabilitySwapnil Jakhade1-93/+137
2020-03-20phy: cadence-torrent: Add wrapper for DPTX register accessSwapnil Jakhade1-21/+50
2020-03-20phy: cadence-torrent: Add wrapper for PHY register accessSwapnil Jakhade1-65/+77
2020-03-20phy: cadence-torrent: Adopt Torrent nomenclatureSwapnil Jakhade1-53/+58
2020-03-20phy: cadence-dp: Rename to phy-cadence-torrentYuti Amonkar3-5/+5
2020-01-14phy: cadence: Sierra: add phy_reset hookRoger Quadros1-0/+10
2020-01-14phy: cadence: Sierra: remove redundant initialization of pointer regmapColin Ian King1-1/+1
2020-01-08phy: cadence: Sierra: Use correct dev pointer in cdns_sierra_phy_remove()Kishon Vijay Abraham I1-1/+1
2020-01-08phy: cadence: Sierra: Set cmn_refclk_dig_div/cmn_refclk1_dig_div frequency to...Kishon Vijay Abraham I1-0/+21
2020-01-08phy: cadence: Sierra: Change MAX_LANES of Sierra to 16Kishon Vijay Abraham I1-1/+21
2020-01-08phy: cadence: Sierra: Check for PLL lock during PHY power onKishon Vijay Abraham I1-1/+32
2020-01-08phy: cadence: Sierra: Get reset control "array" for each linkKishon Vijay Abraham I1-1/+1
2020-01-08phy: cadence: Sierra: Configure both lane cdb and common cdb registers for ex...Anil Varughese1-96/+254
2020-01-08phy: cadence: Sierra: Modify register macro names to be in sync with Sierra u...Kishon Vijay Abraham I1-83/+84
2020-01-08phy: cadence: Sierra: Make cdns_sierra_phy_init() as phy_opsKishon Vijay Abraham I1-6/+9
2020-01-08phy: cadence: Sierra: Add support for SERDES_16G used in J721E SoCKishon Vijay Abraham I1-0/+14
2020-01-08phy: cadence: Sierra: Use "regmap" for read and write to Sierra registersKishon Vijay Abraham I1-54/+237
2020-01-08phy: cadence: Sierra: Make "phy_clk" and "sierra_apb" optional resourcesKishon Vijay Abraham I1-2/+2
2019-05-21treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner2-0/+2
2019-02-07phy: Add Cadence D-PHY supportMaxime Ripard3-1/+404
2018-12-12phy: cadence: Add driver for Sierra PHYAlan Douglas3-1/+404
2018-09-10phy: Add driver for Cadence MHDP DisplayPort SD0801 PHYScott Telford3-0/+552