summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml
blob: 4a257fac577ef9dd887527276f2dff29fe6a05b9 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/memory-controllers/ti,gpmc-child.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: device tree bindings for children of the Texas Instruments GPMC

maintainers:
  - Tony Lindgren <tony@atomide.com>
  - Roger Quadros <rogerq@kernel.org>

description:
  This binding is meant for the child nodes of the GPMC node. The node
  represents any device connected to the GPMC bus. It may be a Flash chip,
  RAM chip or Ethernet controller, etc. These properties are meant for
  configuring the GPMC settings/timings and will accompany the bindings
  supported by the respective device.

properties:
  reg: true

# GPMC Timing properties for child nodes. All are optional and default to 0.
  gpmc,sync-clk-ps:
    description: Minimum clock period for synchronous mode
    default: 0

# Chip-select signal timings corresponding to GPMC_CONFIG2:
  gpmc,cs-on-ns:
    description: Assertion time
    default: 0

  gpmc,cs-rd-off-ns:
    description: Read deassertion time
    default: 0

  gpmc,cs-wr-off-ns:
    description: Write deassertion time
    default: 0

# ADV signal timings corresponding to GPMC_CONFIG3:
  gpmc,adv-on-ns:
    description: Assertion time
    default: 0

  gpmc,adv-rd-off-ns:
    description: Read deassertion time
    default: 0

  gpmc,adv-wr-off-ns:
    description: Write deassertion time
    default: 0

  gpmc,adv-aad-mux-on-ns:
    description: Assertion time for AAD
    default: 0

  gpmc,adv-aad-mux-rd-off-ns:
    description: Read deassertion time for AAD
    default: 0

  gpmc,adv-aad-mux-wr-off-ns:
    description: Write deassertion time for AAD
    default: 0

# WE signals timings corresponding to GPMC_CONFIG4:
  gpmc,we-on-ns:
    description: Assertion time
    default: 0

  gpmc,we-off-ns:
    description: Deassertion time
    default: 0

# OE signals timings corresponding to GPMC_CONFIG4:
  gpmc,oe-on-ns:
    description: Assertion time
    default: 0

  gpmc,oe-off-ns:
    description: Deassertion time
    default: 0

  gpmc,oe-aad-mux-on-ns:
    description: Assertion time for AAD
    default: 0

  gpmc,oe-aad-mux-off-ns:
    description: Deassertion time for AAD
    default: 0

# Access time and cycle time timings (in nanoseconds) corresponding to
# GPMC_CONFIG5:
  gpmc,page-burst-access-ns:
    description: Multiple access word delay
    default: 0

  gpmc,access-ns:
    description: Start-cycle to first data valid delay
    default: 0

  gpmc,rd-cycle-ns:
    description: Total read cycle time
    default: 0

  gpmc,wr-cycle-ns:
    description: Total write cycle time
    default: 0

  gpmc,bus-turnaround-ns:
    description: Turn-around time between successive accesses
    default: 0

  gpmc,cycle2cycle-delay-ns:
    description: Delay between chip-select pulses
    default: 0

  gpmc,clk-activation-ns:
    description: GPMC clock activation time
    default: 0

  gpmc,wait-monitoring-ns:
    description: Start of wait monitoring with regard to valid data
    default: 0

# Boolean timing parameters. If property is present, parameter is enabled
# otherwise disabled.
  gpmc,adv-extra-delay:
    description: ADV signal is delayed by half GPMC clock
    type: boolean

  gpmc,cs-extra-delay:
    description: CS signal is delayed by half GPMC clock
    type: boolean

  gpmc,cycle2cycle-diffcsen:
    description: |
      Add "cycle2cycle-delay" between successive accesses
      to a different CS
    type: boolean

  gpmc,cycle2cycle-samecsen:
    description: |
      Add "cycle2cycle-delay" between successive accesses
      to the same CS
    type: boolean

  gpmc,oe-extra-delay:
    description: OE signal is delayed by half GPMC clock
    type: boolean

  gpmc,we-extra-delay:
    description: WE signal is delayed by half GPMC clock
    type: boolean

  gpmc,time-para-granularity:
    description: Multiply all access times by 2
    type: boolean

# The following two properties are applicable only to OMAP3+ and AM335x:
  gpmc,wr-access-ns:
    description: |
      In synchronous write mode, for single or
      burst accesses, defines the number of
      GPMC_FCLK cycles from start access time
      to the GPMC_CLK rising edge used by the
      memory device for the first data capture.
    default: 0

  gpmc,wr-data-mux-bus-ns:
    description: |
      In address-data multiplex mode, specifies
      the time when the first data is driven on
      the address-data bus.
    default: 0

# GPMC chip-select settings properties for child nodes. All are optional.
  gpmc,burst-length:
    description: Page/burst length.
    $ref: /schemas/types.yaml#/definitions/uint32
    enum: [0, 4, 8, 16]
    default: 0

  gpmc,burst-wrap:
    description: Enables wrap bursting
    type: boolean

  gpmc,burst-read:
    description: Enables read page/burst mode
    type: boolean

  gpmc,burst-write:
    description: Enables write page/burst mode
    type: boolean

  gpmc,device-width:
    description: |
      Total width of device(s) connected to a GPMC
      chip-select in bytes. The GPMC supports 8-bit
      and 16-bit devices and so this property must be
      1 or 2.
    $ref: /schemas/types.yaml#/definitions/uint32
    enum: [1, 2]
    default: 1

  gpmc,mux-add-data:
    description: |
      Address and data multiplexing configuration.
      Valid values are
      0 for Non multiplexed mode
      1 for address-address-data multiplexing mode and
      2 for address-data multiplexing mode.
    $ref: /schemas/types.yaml#/definitions/uint32
    enum: [0, 1, 2]

  gpmc,sync-read:
    description: |
      Enables synchronous read. Defaults to asynchronous
      is this is not set.
    type: boolean

  gpmc,sync-write:
    description: |
      Enables synchronous writes. Defaults to asynchronous
      is this is not set.
    type: boolean

  gpmc,wait-pin:
    description: |
      Wait-pin used by client. Must be less than "gpmc,num-waitpins".
    $ref: /schemas/types.yaml#/definitions/uint32

  ti,wait-pin-polarity:
    description: |
      Set the desired polarity for the selected wait pin.
      0 for active low, 1 for active high.
    $ref: /schemas/types.yaml#/definitions/uint32
    enum: [0, 1]

  gpmc,wait-on-read:
    description: Enables wait monitoring on reads.
    type: boolean

  gpmc,wait-on-write:
    description: Enables wait monitoring on writes.
    type: boolean

required:
  - reg

# the GPMC child will have its own native properties
additionalProperties: true