summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml
blob: d681a4676f0693a81f7c9f518c11310d3e8241dd (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mtd/rockchip,nand-controller.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Rockchip SoCs NAND FLASH Controller (NFC)

allOf:
  - $ref: "nand-controller.yaml#"

maintainers:
  - Heiko Stuebner <heiko@sntech.de>

properties:
  compatible:
    oneOf:
      - const: rockchip,px30-nfc
      - const: rockchip,rk2928-nfc
      - const: rockchip,rv1108-nfc
      - items:
          - const: rockchip,rk3036-nfc
          - const: rockchip,rk2928-nfc
      - items:
          - const: rockchip,rk3308-nfc
          - const: rockchip,rv1108-nfc

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    minItems: 1
    items:
      - description: Bus Clock
      - description: Module Clock

  clock-names:
    minItems: 1
    items:
      - const: ahb
      - const: nfc

  assigned-clocks:
    maxItems: 1

  assigned-clock-rates:
    maxItems: 1

  power-domains:
    maxItems: 1

patternProperties:
  "^nand@[0-7]$":
    type: object
    properties:
      reg:
        minimum: 0
        maximum: 7

      nand-ecc-mode:
        const: hw

      nand-ecc-step-size:
        const: 1024

      nand-ecc-strength:
        enum: [16, 24, 40, 60, 70]
        description: |
          The ECC configurations that can be supported are as follows.
            NFC v600 ECC 16, 24, 40, 60
              RK2928, RK3066, RK3188

            NFC v622 ECC 16, 24, 40, 60
              RK3036, RK3128

            NFC v800 ECC 16
              RK3308, RV1108

            NFC v900 ECC 16, 40, 60, 70
              RK3326, PX30

      nand-bus-width:
        const: 8

      rockchip,boot-blks:
        $ref: /schemas/types.yaml#/definitions/uint32
        minimum: 2
        default: 16
        description:
          The NFC driver need this information to select ECC
          algorithms supported by the boot ROM.
          Only used in combination with 'nand-is-boot-medium'.

      rockchip,boot-ecc-strength:
        enum: [16, 24, 40, 60, 70]
        $ref: /schemas/types.yaml#/definitions/uint32
        description: |
          If specified it indicates that a different BCH/ECC setting is
          supported by the boot ROM.
            NFC v600 ECC 16, 24
              RK2928, RK3066, RK3188

            NFC v622 ECC 16, 24, 40, 60
              RK3036, RK3128

            NFC v800 ECC 16
              RK3308, RV1108

            NFC v900 ECC 16, 70
              RK3326, PX30

          Only used in combination with 'nand-is-boot-medium'.

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/rk3308-cru.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    nfc: nand-controller@ff4b0000 {
      compatible = "rockchip,rk3308-nfc",
                   "rockchip,rv1108-nfc";
      reg = <0xff4b0000 0x4000>;
      interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
      clocks = <&cru HCLK_NANDC>, <&cru SCLK_NANDC>;
      clock-names = "ahb", "nfc";
      assigned-clocks = <&clks SCLK_NANDC>;
      assigned-clock-rates = <150000000>;

      pinctrl-0 = <&flash_ale &flash_bus8 &flash_cle &flash_csn0
                   &flash_rdn &flash_rdy &flash_wrn>;
      pinctrl-names = "default";

      #address-cells = <1>;
      #size-cells = <0>;

      nand@0 {
        reg = <0>;
        label = "rk-nand";
        nand-bus-width = <8>;
        nand-ecc-mode = "hw";
        nand-ecc-step-size = <1024>;
        nand-ecc-strength = <16>;
        nand-is-boot-medium;
        rockchip,boot-blks = <8>;
        rockchip,boot-ecc-strength = <16>;
      };
    };

...